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[SystemZ] Use SystemZCallingConv.td to define callee-saved registers
Just a clean-up. No behavioral change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212711 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -13,7 +13,7 @@ class CCIfExtend<CCAction A>
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: CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>;
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//===----------------------------------------------------------------------===//
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// SVR4 return value calling convention
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// z/Linux return value calling convention
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//===----------------------------------------------------------------------===//
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def RetCC_SystemZ : CallingConv<[
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// Promote i32 to i64 if it has an explicit extension type.
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@ -39,7 +39,7 @@ def RetCC_SystemZ : CallingConv<[
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]>;
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//===----------------------------------------------------------------------===//
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// SVR4 argument calling conventions
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// z/Linux argument calling conventions
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//===----------------------------------------------------------------------===//
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def CC_SystemZ : CallingConv<[
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// Promote i32 to i64 if it has an explicit extension type.
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@ -63,3 +63,9 @@ def CC_SystemZ : CallingConv<[
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// Other arguments are passed in 8-byte-aligned 8-byte stack slots.
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CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>
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]>;
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//===----------------------------------------------------------------------===//
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// z/Linux callee-saved registers
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//===----------------------------------------------------------------------===//
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def CSR_SystemZ : CalleeSavedRegs<(add (sequence "R%dD", 6, 15),
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(sequence "F%dD", 8, 15))>;
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@ -914,6 +914,12 @@ SystemZTargetLowering::LowerCall(CallLoweringInfo &CLI,
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Ops.push_back(DAG.getRegister(RegsToPass[I].first,
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RegsToPass[I].second.getValueType()));
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// Add a register mask operand representing the call-preserved registers.
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const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo();
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const uint32_t *Mask = TRI->getCallPreservedMask(CallConv);
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assert(Mask && "Missing call preserved mask for calling convention");
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Ops.push_back(DAG.getRegisterMask(Mask));
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// Glue the call to the argument copies, if any.
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if (Glue.getNode())
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Ops.push_back(Glue);
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@ -233,9 +233,7 @@ defm CondStore64 : CondStores<GR64, nonvolatile_store,
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// Call instructions
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//===----------------------------------------------------------------------===//
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// The definitions here are for the call-clobbered registers.
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let isCall = 1, Defs = [R0D, R1D, R2D, R3D, R4D, R5D, R14D,
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F0D, F1D, F2D, F3D, F4D, F5D, F6D, F7D, CC] in {
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let isCall = 1, Defs = [R14D, CC] in {
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def CallBRASL : Alias<6, (outs), (ins pcrel32:$I2, variable_ops),
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[(z_call pcrel32:$I2)]>;
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def CallBASR : Alias<2, (outs), (ins ADDR64:$R2, variable_ops),
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@ -22,18 +22,14 @@ using namespace llvm;
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SystemZRegisterInfo::SystemZRegisterInfo()
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: SystemZGenRegisterInfo(SystemZ::R14D) {}
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const MCPhysReg*
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const MCPhysReg *
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SystemZRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
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static const MCPhysReg CalleeSavedRegs[] = {
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SystemZ::R6D, SystemZ::R7D, SystemZ::R8D, SystemZ::R9D,
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SystemZ::R10D, SystemZ::R11D, SystemZ::R12D, SystemZ::R13D,
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SystemZ::R14D, SystemZ::R15D,
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SystemZ::F8D, SystemZ::F9D, SystemZ::F10D, SystemZ::F11D,
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SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D,
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0
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};
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return CSR_SystemZ_SaveList;
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}
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return CalleeSavedRegs;
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const uint32_t *
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SystemZRegisterInfo::getCallPreservedMask(CallingConv::ID CC) const {
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return CSR_SystemZ_RegMask;
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}
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BitVector
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@ -45,6 +45,7 @@ public:
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}
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const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF = nullptr) const
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override;
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const uint32_t *getCallPreservedMask(CallingConv::ID CC) const override;
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BitVector getReservedRegs(const MachineFunction &MF) const override;
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void eliminateFrameIndex(MachineBasicBlock::iterator MI,
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int SPAdj, unsigned FIOperandNum,
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