Rename Pair to RCPair lacking any better naming ideas.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134210 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2011-06-30 23:50:52 +00:00
parent e08d4335ad
commit 35e6d4d6b6

View File

@ -7528,8 +7528,8 @@ ARMTargetLowering::getSingleConstraintMatchWeight(
return weight;
}
typedef std::pair<unsigned, const TargetRegisterClass*> Pair;
Pair
typedef std::pair<unsigned, const TargetRegisterClass*> RCPair;
RCPair
ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
EVT VT) const {
if (Constraint.size() == 1) {
@ -7537,23 +7537,23 @@ ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
switch (Constraint[0]) {
case 'l': // Low regs or general regs.
if (Subtarget->isThumb())
return Pair(0U, ARM::tGPRRegisterClass);
return RCPair(0U, ARM::tGPRRegisterClass);
else
return Pair(0U, ARM::GPRRegisterClass);
return RCPair(0U, ARM::GPRRegisterClass);
case 'h': // High regs or no regs.
if (Subtarget->isThumb())
return Pair(0U, ARM::hGPRRegisterClass);
return RCPair(0U, ARM::hGPRRegisterClass);
else
return Pair(0u, static_cast<const TargetRegisterClass*>(0));
return RCPair(0u, static_cast<const TargetRegisterClass*>(0));
case 'r':
return Pair(0U, ARM::GPRRegisterClass);
return RCPair(0U, ARM::GPRRegisterClass);
case 'w':
if (VT == MVT::f32)
return Pair(0U, ARM::SPRRegisterClass);
return RCPair(0U, ARM::SPRRegisterClass);
if (VT.getSizeInBits() == 64)
return Pair(0U, ARM::DPRRegisterClass);
return RCPair(0U, ARM::DPRRegisterClass);
if (VT.getSizeInBits() == 128)
return Pair(0U, ARM::QPRRegisterClass);
return RCPair(0U, ARM::QPRRegisterClass);
break;
}
}