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R600: Disable the BFE pattern
This pattern uses an SDNodeXForm, which isn't being emitted for some reason. I can get it to work by attaching the PatLeaf that has the XForm to the argument in the output pattern, but this results in an immediate being used in a register operand, which the backend can't handle yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199918 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -388,6 +388,11 @@ class SHA256MaPattern <Instruction BFI_INT, Instruction XOR> : Pat <
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// Bitfield extract patterns
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/*
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XXX: The BFE pattern is not working correctly because the XForm is not being
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applied.
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def legalshift32 : ImmLeaf <i32, [{return Imm >=0 && Imm < 32;}]>;
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def bfemask : PatLeaf <(imm), [{return isMask_32(N->getZExtValue());}],
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SDNodeXForm<imm, [{ return CurDAG->getTargetConstant(CountTrailingOnes_32(N->getZExtValue()), MVT::i32);}]>>;
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@ -397,6 +402,8 @@ class BFEPattern <Instruction BFE> : Pat <
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(BFE $x, $y, $z)
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>;
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*/
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// rotr pattern
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class ROTRPattern <Instruction BIT_ALIGN> : Pat <
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(rotr i32:$src0, i32:$src1),
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@ -1526,7 +1526,9 @@ let Predicates = [isEGorCayman] in {
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i32:$src2))],
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VecALU
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>;
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def : BFEPattern <BFE_UINT_eg>;
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// XXX: This pattern is broken, disabling for now. See comment in
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// AMDGPUInstructions.td for more info.
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// def : BFEPattern <BFE_UINT_eg>;
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def BFI_INT_eg : R600_3OP <0x06, "BFI_INT", [], VecALU>;
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defm : BFIPatterns <BFI_INT_eg>;
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@ -1,5 +1,7 @@
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; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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; XFAIL: *
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; CHECK: @bfe_def
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; CHECK: BFE_UINT
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define void @bfe_def(i32 addrspace(1)* %out, i32 %x) {
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