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PTX: Re-work target sm/compute selection and add some basic GPU
targets: g80, gt200, gf100(fermi) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133799 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -30,31 +30,51 @@ def FeatureNoFMA : SubtargetFeature<"no-fma","SupportsFMA", "false",
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//===- PTX Version --------------------------------------------------------===//
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def FeaturePTX20 : SubtargetFeature<"ptx20", "PTXVersion", "PTX_VERSION_2_0",
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"Use PTX Language Version 2.0",
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[]>;
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"Use PTX Language Version 2.0">;
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def FeaturePTX21 : SubtargetFeature<"ptx21", "PTXVersion", "PTX_VERSION_2_1",
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"Use PTX Language Version 2.1",
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[FeaturePTX20]>;
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"Use PTX Language Version 2.1">;
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def FeaturePTX22 : SubtargetFeature<"ptx22", "PTXVersion", "PTX_VERSION_2_2",
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"Use PTX Language Version 2.2",
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[FeaturePTX21]>;
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"Use PTX Language Version 2.2">;
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def FeaturePTX23 : SubtargetFeature<"ptx23", "PTXVersion", "PTX_VERSION_2_3",
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"Use PTX Language Version 2.3",
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[FeaturePTX22]>;
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"Use PTX Language Version 2.3">;
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//===- PTX Shader Model ---------------------------------------------------===//
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//===- PTX Target ---------------------------------------------------------===//
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def FeatureSM10 : SubtargetFeature<"sm10", "PTXShaderModel", "PTX_SM_1_0",
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"Enable Shader Model 1.0 compliance">;
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def FeatureSM13 : SubtargetFeature<"sm13", "PTXShaderModel", "PTX_SM_1_3",
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"Enable Shader Model 1.3 compliance",
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[FeatureSM10, FeatureDouble]>;
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def FeatureSM20 : SubtargetFeature<"sm20", "PTXShaderModel", "PTX_SM_2_0",
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"Enable Shader Model 2.0 compliance",
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[FeatureSM13]>;
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def FeatureSM10 : SubtargetFeature<"sm10", "PTXTarget", "PTX_SM_1_0",
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"Use Shader Model 1.0">;
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def FeatureSM11 : SubtargetFeature<"sm11", "PTXTarget", "PTX_SM_1_1",
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"Use Shader Model 1.1">;
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def FeatureSM12 : SubtargetFeature<"sm12", "PTXTarget", "PTX_SM_1_2",
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"Use Shader Model 1.2">;
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def FeatureSM13 : SubtargetFeature<"sm13", "PTXTarget", "PTX_SM_1_3",
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"Use Shader Model 1.3">;
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def FeatureSM20 : SubtargetFeature<"sm20", "PTXTarget", "PTX_SM_2_0",
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"Use Shader Model 2.0">;
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def FeatureSM21 : SubtargetFeature<"sm21", "PTXTarget", "PTX_SM_2_1",
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"Use Shader Model 2.1">;
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def FeatureSM22 : SubtargetFeature<"sm22", "PTXTarget", "PTX_SM_2_2",
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"Use Shader Model 2.2">;
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def FeatureSM23 : SubtargetFeature<"sm23", "PTXTarget", "PTX_SM_2_3",
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"Use Shader Model 2.3">;
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def FeatureCOMPUTE10 : SubtargetFeature<"compute10", "PTXTarget",
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"PTX_COMPUTE_1_0",
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"Use Compute Compatibility 1.0">;
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def FeatureCOMPUTE11 : SubtargetFeature<"compute11", "PTXTarget",
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"PTX_COMPUTE_1_1",
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"Use Compute Compatibility 1.1">;
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def FeatureCOMPUTE12 : SubtargetFeature<"compute12", "PTXTarget",
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"PTX_COMPUTE_1_2",
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"Use Compute Compatibility 1.2">;
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def FeatureCOMPUTE13 : SubtargetFeature<"compute13", "PTXTarget",
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"PTX_COMPUTE_1_3",
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"Use Compute Compatibility 1.3">;
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def FeatureCOMPUTE20 : SubtargetFeature<"compute20", "PTXTarget",
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"PTX_COMPUTE_2_0",
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"Use Compute Compatibility 2.0">;
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//===----------------------------------------------------------------------===//
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// PTX supported processors
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@ -65,6 +85,27 @@ class Proc<string Name, list<SubtargetFeature> Features>
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def : Proc<"generic", []>;
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// Processor definitions for compute/shader models
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def : Proc<"compute_10", [FeatureCOMPUTE10]>;
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def : Proc<"compute_11", [FeatureCOMPUTE11]>;
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def : Proc<"compute_12", [FeatureCOMPUTE12]>;
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def : Proc<"compute_13", [FeatureCOMPUTE13]>;
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def : Proc<"compute_20", [FeatureCOMPUTE20]>;
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def : Proc<"sm_10", [FeatureSM10]>;
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def : Proc<"sm_11", [FeatureSM11]>;
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def : Proc<"sm_12", [FeatureSM12]>;
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def : Proc<"sm_13", [FeatureSM13]>;
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def : Proc<"sm_20", [FeatureSM20]>;
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def : Proc<"sm_21", [FeatureSM21]>;
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def : Proc<"sm_22", [FeatureSM22]>;
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def : Proc<"sm_23", [FeatureSM23]>;
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// Processor definitions for common GPU architectures
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def : Proc<"g80", [FeatureSM10]>;
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def : Proc<"gt200", [FeatureSM13]>;
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def : Proc<"gf100", [FeatureSM20, FeatureDouble]>;
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def : Proc<"fermi", [FeatureSM20, FeatureDouble]>;
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//===----------------------------------------------------------------------===//
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// Register File Description
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//===----------------------------------------------------------------------===//
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@ -462,7 +462,7 @@ void PTXAsmPrinter::EmitFunctionDeclaration() {
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if (i != b) {
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decl += ", ";
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}
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if (isKernel || ST.getShaderModel() >= PTXSubtarget::PTX_SM_2_0) {
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if (isKernel || ST.useParamSpaceForDeviceArgs()) {
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decl += ".param .b";
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decl += utostr(*i);
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decl += " ";
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@ -213,7 +213,7 @@ SDValue PTXTargetLowering::
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// We do one of two things here:
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// IsKernel || SM >= 2.0 -> Use param space for arguments
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// SM < 2.0 -> Use registers for arguments
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if (MFI->isKernel() || ST.getShaderModel() >= PTXSubtarget::PTX_SM_2_0) {
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if (MFI->isKernel() || ST.useParamSpaceForDeviceArgs()) {
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// We just need to emit the proper LOAD_PARAM ISDs
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for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
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@ -26,10 +26,10 @@ def Use32BitAddresses : Predicate<"!getSubtarget().is64Bit()">;
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def Use64BitAddresses : Predicate<"getSubtarget().is64Bit()">;
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// Shader Model Support
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def SupportsSM13 : Predicate<"getSubtarget().supportsSM13()">;
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def DoesNotSupportSM13 : Predicate<"!getSubtarget().supportsSM13()">;
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def SupportsSM20 : Predicate<"getSubtarget().supportsSM20()">;
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def DoesNotSupportSM20 : Predicate<"!getSubtarget().supportsSM20()">;
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def FDivNeedsRoundingMode : Predicate<"getSubtarget().fdivNeedsRoundingMode()">;
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def FDivNoRoundingMode : Predicate<"!getSubtarget().fdivNeedsRoundingMode()">;
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def FMadNeedsRoundingMode : Predicate<"getSubtarget().fmadNeedsRoundingMode()">;
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def FMadNoRoundingMode : Predicate<"!getSubtarget().fmadNeedsRoundingMode()">;
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// PTX Version Support
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def SupportsPTX21 : Predicate<"getSubtarget().supportsPTX21()">;
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@ -613,43 +613,43 @@ def FDIVrr32SM13 : InstPTX<(outs RegF32:$d),
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(ins RegF32:$a, RegF32:$b),
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"div.rn.f32\t$d, $a, $b",
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[(set RegF32:$d, (fdiv RegF32:$a, RegF32:$b))]>,
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Requires<[SupportsSM13]>;
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Requires<[FDivNeedsRoundingMode]>;
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def FDIVri32SM13 : InstPTX<(outs RegF32:$d),
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(ins RegF32:$a, f32imm:$b),
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"div.rn.f32\t$d, $a, $b",
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[(set RegF32:$d, (fdiv RegF32:$a, fpimm:$b))]>,
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Requires<[SupportsSM13]>;
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Requires<[FDivNeedsRoundingMode]>;
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def FDIVrr32SM10 : InstPTX<(outs RegF32:$d),
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(ins RegF32:$a, RegF32:$b),
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"div.f32\t$d, $a, $b",
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[(set RegF32:$d, (fdiv RegF32:$a, RegF32:$b))]>,
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Requires<[DoesNotSupportSM13]>;
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Requires<[FDivNoRoundingMode]>;
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def FDIVri32SM10 : InstPTX<(outs RegF32:$d),
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(ins RegF32:$a, f32imm:$b),
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"div.f32\t$d, $a, $b",
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[(set RegF32:$d, (fdiv RegF32:$a, fpimm:$b))]>,
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Requires<[DoesNotSupportSM13]>;
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Requires<[FDivNoRoundingMode]>;
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def FDIVrr64SM13 : InstPTX<(outs RegF64:$d),
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(ins RegF64:$a, RegF64:$b),
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"div.rn.f64\t$d, $a, $b",
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[(set RegF64:$d, (fdiv RegF64:$a, RegF64:$b))]>,
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Requires<[SupportsSM13]>;
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Requires<[FDivNeedsRoundingMode]>;
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def FDIVri64SM13 : InstPTX<(outs RegF64:$d),
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(ins RegF64:$a, f64imm:$b),
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"div.rn.f64\t$d, $a, $b",
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[(set RegF64:$d, (fdiv RegF64:$a, fpimm:$b))]>,
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Requires<[SupportsSM13]>;
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Requires<[FDivNeedsRoundingMode]>;
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def FDIVrr64SM10 : InstPTX<(outs RegF64:$d),
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(ins RegF64:$a, RegF64:$b),
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"div.f64\t$d, $a, $b",
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[(set RegF64:$d, (fdiv RegF64:$a, RegF64:$b))]>,
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Requires<[DoesNotSupportSM13]>;
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Requires<[FDivNoRoundingMode]>;
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def FDIVri64SM10 : InstPTX<(outs RegF64:$d),
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(ins RegF64:$a, f64imm:$b),
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"div.f64\t$d, $a, $b",
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[(set RegF64:$d, (fdiv RegF64:$a, fpimm:$b))]>,
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Requires<[DoesNotSupportSM13]>;
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Requires<[FDivNoRoundingMode]>;
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@ -661,8 +661,10 @@ def FDIVri64SM10 : InstPTX<(outs RegF64:$d),
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// In the short term, mad is supported on all PTX versions and we use a
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// default rounding mode no matter what shader model or PTX version.
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// TODO: Allow the rounding mode to be selectable through llc.
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defm FMADSM13 : PTX_FLOAT_4OP<"mad.rn", fmul, fadd>, Requires<[SupportsSM13, SupportsFMA]>;
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defm FMAD : PTX_FLOAT_4OP<"mad", fmul, fadd>, Requires<[DoesNotSupportSM13, SupportsFMA]>;
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defm FMADSM13 : PTX_FLOAT_4OP<"mad.rn", fmul, fadd>,
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Requires<[FMadNeedsRoundingMode, SupportsFMA]>;
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defm FMAD : PTX_FLOAT_4OP<"mad", fmul, fadd>,
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Requires<[FMadNoRoundingMode, SupportsFMA]>;
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///===- Floating-Point Intrinsic Instructions -----------------------------===//
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@ -18,21 +18,31 @@ using namespace llvm;
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PTXSubtarget::PTXSubtarget(const std::string &TT, const std::string &FS,
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bool is64Bit)
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: PTXShaderModel(PTX_SM_1_0),
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: PTXTarget(PTX_COMPUTE_1_0),
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PTXVersion(PTX_VERSION_2_0),
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SupportsDouble(false),
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SupportsFMA(true),
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Is64Bit(is64Bit) {
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Is64Bit(is64Bit) {
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std::string TARGET = "generic";
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ParseSubtargetFeatures(FS, TARGET);
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}
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std::string PTXSubtarget::getTargetString() const {
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switch(PTXShaderModel) {
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default: llvm_unreachable("Unknown shader model");
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switch(PTXTarget) {
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default: llvm_unreachable("Unknown PTX target");
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case PTX_SM_1_0: return "sm_10";
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case PTX_SM_1_1: return "sm_11";
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case PTX_SM_1_2: return "sm_12";
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case PTX_SM_1_3: return "sm_13";
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case PTX_SM_2_0: return "sm_20";
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case PTX_SM_2_1: return "sm_21";
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case PTX_SM_2_2: return "sm_22";
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case PTX_SM_2_3: return "sm_23";
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case PTX_COMPUTE_1_0: return "compute_10";
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case PTX_COMPUTE_1_1: return "compute_11";
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case PTX_COMPUTE_1_2: return "compute_12";
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case PTX_COMPUTE_1_3: return "compute_13";
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case PTX_COMPUTE_2_0: return "compute_20";
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}
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}
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@ -23,10 +23,23 @@ namespace llvm {
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/**
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* Enumeration of Shader Models supported by the back-end.
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*/
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enum PTXShaderModelEnum {
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enum PTXTargetEnum {
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PTX_COMPUTE_1_0, /*< Compute Compatibility 1.0 */
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PTX_COMPUTE_1_1, /*< Compute Compatibility 1.1 */
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PTX_COMPUTE_1_2, /*< Compute Compatibility 1.2 */
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PTX_COMPUTE_1_3, /*< Compute Compatibility 1.3 */
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PTX_COMPUTE_2_0, /*< Compute Compatibility 2.0 */
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PTX_LAST_COMPUTE,
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PTX_SM_1_0, /*< Shader Model 1.0 */
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PTX_SM_1_1, /*< Shader Model 1.1 */
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PTX_SM_1_2, /*< Shader Model 1.2 */
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PTX_SM_1_3, /*< Shader Model 1.3 */
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PTX_SM_2_0 /*< Shader Model 2.0 */
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PTX_SM_2_0, /*< Shader Model 2.0 */
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PTX_SM_2_1, /*< Shader Model 2.1 */
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PTX_SM_2_2, /*< Shader Model 2.2 */
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PTX_SM_2_3, /*< Shader Model 2.3 */
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PTX_LAST_SM
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};
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/**
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@ -44,7 +57,7 @@ namespace llvm {
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private:
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/// Shader Model supported on the target GPU.
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PTXShaderModelEnum PTXShaderModel;
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PTXTargetEnum PTXTarget;
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/// PTX Language Version.
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PTXVersionEnum PTXVersion;
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@ -74,18 +87,26 @@ namespace llvm {
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bool supportsFMA() const { return SupportsFMA; }
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bool supportsSM13() const { return PTXShaderModel >= PTX_SM_1_3; }
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bool supportsSM20() const { return PTXShaderModel >= PTX_SM_2_0; }
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bool supportsPTX21() const { return PTXVersion >= PTX_VERSION_2_1; }
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bool supportsPTX22() const { return PTXVersion >= PTX_VERSION_2_2; }
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bool supportsPTX23() const { return PTXVersion >= PTX_VERSION_2_3; }
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PTXShaderModelEnum getShaderModel() const { return PTXShaderModel; }
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bool fdivNeedsRoundingMode() const {
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return (PTXTarget >= PTX_SM_1_3 && PTXTarget < PTX_LAST_SM) ||
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(PTXTarget >= PTX_COMPUTE_1_3 && PTXTarget < PTX_LAST_COMPUTE);
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}
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bool fmadNeedsRoundingMode() const {
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return (PTXTarget >= PTX_SM_1_3 && PTXTarget < PTX_LAST_SM) ||
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(PTXTarget >= PTX_COMPUTE_1_3 && PTXTarget < PTX_LAST_COMPUTE);
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}
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bool useParamSpaceForDeviceArgs() const {
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return (PTXTarget >= PTX_SM_2_0 && PTXTarget < PTX_LAST_SM) ||
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(PTXTarget >= PTX_COMPUTE_2_0 && PTXTarget < PTX_LAST_COMPUTE);
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}
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std::string ParseSubtargetFeatures(const std::string &FS,
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const std::string &CPU);
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