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https://github.com/c64scene-ar/llvm-6502.git
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[PPC] Use SeparateConstOffsetFromGEP
This mirrors r222331, which enabled SeparateConstOffsetFromGEP on AArch64, in the PowerPC backend. Yields, on a POWER7 machine, a 30% speedup on SingleSource/Benchmarks/Shootout/nestedloop (this might just be from LICM, there is a store moved out of the inner loop) and a potential speedup on MultiSource/Benchmarks/mediabench/mpeg2/mpeg2dec/mpeg2decode. Regardless, it makes some code look cleaner, and synchronizing the backends in this regard seems like a generally good thing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222504 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel
parent
c670d3bfc3
commit
361eafaffa
@ -22,6 +22,7 @@
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#include "llvm/Support/FormattedStream.h"
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#include "llvm/Support/FormattedStream.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Transforms/Scalar.h"
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using namespace llvm;
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using namespace llvm;
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static cl::
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static cl::
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@ -32,6 +33,11 @@ static cl::opt<bool>
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VSXFMAMutateEarly("schedule-ppc-vsx-fma-mutation-early",
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VSXFMAMutateEarly("schedule-ppc-vsx-fma-mutation-early",
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cl::Hidden, cl::desc("Schedule VSX FMA instruction mutation early"));
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cl::Hidden, cl::desc("Schedule VSX FMA instruction mutation early"));
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static cl::opt<bool>
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EnableGEPOpt("ppc-gep-opt", cl::Hidden,
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cl::desc("Enable optimizations on complex GEPs"),
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cl::init(true));
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extern "C" void LLVMInitializePowerPCTarget() {
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extern "C" void LLVMInitializePowerPCTarget() {
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// Register the targets
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// Register the targets
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RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
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RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
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@ -168,6 +174,20 @@ TargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) {
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void PPCPassConfig::addIRPasses() {
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void PPCPassConfig::addIRPasses() {
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addPass(createAtomicExpandPass(&getPPCTargetMachine()));
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addPass(createAtomicExpandPass(&getPPCTargetMachine()));
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if (TM->getOptLevel() == CodeGenOpt::Aggressive && EnableGEPOpt) {
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// Call SeparateConstOffsetFromGEP pass to extract constants within indices
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// and lower a GEP with multiple indices to either arithmetic operations or
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// multiple GEPs with single index.
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addPass(createSeparateConstOffsetFromGEPPass(TM, true));
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// Call EarlyCSE pass to find and remove subexpressions in the lowered
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// result.
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addPass(createEarlyCSEPass());
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// Do loop invariant code motion in case part of the lowered result is
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// invariant.
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addPass(createLICMPass());
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}
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TargetPassConfig::addIRPasses();
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TargetPassConfig::addIRPasses();
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}
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}
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157
test/CodeGen/PowerPC/ppc64-gep-opt.ll
Normal file
157
test/CodeGen/PowerPC/ppc64-gep-opt.ll
Normal file
@ -0,0 +1,157 @@
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; RUN: llc -O3 -mcpu=pwr7 < %s | FileCheck %s
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; RUN: llc -O3 -print-after=codegenprepare -mcpu=ppc64 < %s >%t 2>&1 && FileCheck --check-prefix=CHECK-NoAA <%t %s
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; RUN: llc -O3 -print-after=codegenprepare -mcpu=pwr7 < %s >%t 2>&1 && FileCheck --check-prefix=CHECK-UseAA <%t %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Following test cases test enabling SeparateConstOffsetFromGEP pass in the PPC
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; backend. If useAA() returns true, it will lower a GEP with multiple indices
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; into GEPs with a single index, otherwise it will lower it into a
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; "ptrtoint+arithmetics+inttoptr" form.
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%struct = type { i32, i32, i32, i32, [20 x i32] }
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; Check that when two complex GEPs are used in two basic blocks, LLVM can
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; elimilate the common subexpression for the second use.
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define void @test_GEP_CSE([240 x %struct]* %string, i32* %adj, i32 %lib, i64 %idxprom) {
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%liberties = getelementptr [240 x %struct]* %string, i64 1, i64 %idxprom, i32 3
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%1 = load i32* %liberties, align 4
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%cmp = icmp eq i32 %1, %lib
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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%origin = getelementptr [240 x %struct]* %string, i64 1, i64 %idxprom, i32 2
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%2 = load i32* %origin, align 4
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store i32 %2, i32* %adj, align 4
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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; CHECK-NoAA-LABEL: @test_GEP_CSE(
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; CHECK-NoAA: [[PTR0:%[a-zA-Z0-9]+]] = ptrtoint [240 x %struct]* %string to i64
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; CHECK-NoAA: [[PTR1:%[a-zA-Z0-9]+]] = mul i64 %idxprom, 96
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; CHECK-NoAA: [[PTR2:%[a-zA-Z0-9]+]] = add i64 [[PTR0]], [[PTR1]]
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; CHECK-NoAA: add i64 [[PTR2]], 23052
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; CHECK-NoAA: inttoptr
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; CHECK-NoAA: if.then:
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; CHECK-NoAA-NOT: ptrtoint
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; CHECK-NoAA-NOT: mul
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; CHECK-NoAA: add i64 [[PTR2]], 23048
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; CHECK-NoAA: inttoptr
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; CHECK-UseAA-LABEL: @test_GEP_CSE(
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; CHECK-UseAA: [[PTR0:%[a-zA-Z0-9]+]] = bitcast [240 x %struct]* %string to i8*
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; CHECK-UseAA: [[IDX:%[a-zA-Z0-9]+]] = mul i64 %idxprom, 96
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; CHECK-UseAA: [[PTR1:%[a-zA-Z0-9]+]] = getelementptr i8* [[PTR0]], i64 [[IDX]]
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; CHECK-UseAA: getelementptr i8* [[PTR1]], i64 23052
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; CHECK-UseAA: bitcast
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; CHECK-UseAA: if.then:
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; CHECK-UseAA: getelementptr i8* [[PTR1]], i64 23048
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; CHECK-UseAA: bitcast
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%class.my = type { i32, [128 x i32], i32, [256 x %struct.pt]}
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%struct.pt = type { %struct.point*, i32, i32 }
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%struct.point = type { i32, i32 }
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; Check when a GEP is used across two basic block, LLVM can sink the address
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; calculation and code gen can generate a better addressing mode for the second
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; use.
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define void @test_GEP_across_BB(%class.my* %this, i64 %idx) {
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%1 = getelementptr %class.my* %this, i64 0, i32 3, i64 %idx, i32 1
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%2 = load i32* %1, align 4
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%3 = getelementptr %class.my* %this, i64 0, i32 3, i64 %idx, i32 2
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%4 = load i32* %3, align 4
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%5 = icmp eq i32 %2, %4
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br i1 %5, label %if.true, label %exit
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if.true:
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%6 = shl i32 %4, 1
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store i32 %6, i32* %3, align 4
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br label %exit
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exit:
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%7 = add nsw i32 %4, 1
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store i32 %7, i32* %1, align 4
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ret void
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}
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; CHECK-LABEL: test_GEP_across_BB:
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; CHECK-NOT: lwzu
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; CHECK: blr
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; CHECK-NoAA-LABEL: test_GEP_across_BB(
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; CHECK-NoAA: add i64 [[TMP:%[a-zA-Z0-9]+]], 528
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; CHECK-NoAA: add i64 [[TMP]], 532
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; CHECK-NoAA: if.true:
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; CHECK-NoAA: {{%sunk[a-zA-Z0-9]+}} = add i64 [[TMP]], 532
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; CHECK-NoAA: exit:
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; CHECK-NoAA: {{%sunk[a-zA-Z0-9]+}} = add i64 [[TMP]], 528
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; CHECK-UseAA-LABEL: test_GEP_across_BB(
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; CHECK-UseAA: [[PTR0:%[a-zA-Z0-9]+]] = getelementptr
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; CHECK-UseAA: getelementptr i8* [[PTR0]], i64 528
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; CHECK-UseAA: getelementptr i8* [[PTR0]], i64 532
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; CHECK-UseAA: if.true:
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; CHECK-UseAA: {{%sunk[a-zA-Z0-9]+}} = getelementptr i8* [[PTR0]], i64 532
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; CHECK-UseAA: exit:
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; CHECK-UseAA: {{%sunk[a-zA-Z0-9]+}} = getelementptr i8* [[PTR0]], i64 528
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%struct.S = type { float, double }
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@struct_array = global [1024 x %struct.S] zeroinitializer, align 16
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; The following two test cases check we can extract constant from indices of
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; struct type.
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; The constant offsets are from indices "i64 %idxprom" and "i32 1". As the
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; alloca size of %struct.S is 16, and "i32 1" is the 2rd element whose field
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; offset is 8, the total constant offset is (5 * 16 + 8) = 88.
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define double* @test-struct_1(i32 %i) {
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entry:
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%add = add nsw i32 %i, 5
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%idxprom = sext i32 %add to i64
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%p = getelementptr [1024 x %struct.S]* @struct_array, i64 0, i64 %idxprom, i32 1
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ret double* %p
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}
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; CHECK-NoAA-LABEL: @test-struct_1(
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; CHECK-NoAA-NOT: getelementptr
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; CHECK-NoAA: add i64 %{{[a-zA-Z0-9]+}}, 88
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; CHECK-UseAA-LABEL: @test-struct_1(
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; CHECK-UseAA: getelementptr i8* %{{[a-zA-Z0-9]+}}, i64 88
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%struct3 = type { i64, i32 }
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%struct2 = type { %struct3, i32 }
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%struct1 = type { i64, %struct2 }
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%struct0 = type { i32, i32, i64*, [100 x %struct1] }
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; The constant offsets are from indices "i32 3", "i64 %arrayidx" and "i32 1".
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; "i32 3" is the 4th element whose field offset is 16. The alloca size of
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; %struct1 is 32. "i32 1" is the 2rd element whose field offset is 8. So the
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; total constant offset is 16 + (-2 * 32) + 8 = -40
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define %struct2* @test-struct_2(%struct0* %ptr, i64 %idx) {
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entry:
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%arrayidx = add nsw i64 %idx, -2
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%ptr2 = getelementptr %struct0* %ptr, i64 0, i32 3, i64 %arrayidx, i32 1
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ret %struct2* %ptr2
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}
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; CHECK-NoAA-LABEL: @test-struct_2(
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; CHECK-NoAA-NOT: = getelementptr
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; CHECK-NoAA: add i64 %{{[a-zA-Z0-9]+}}, -40
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; CHECK-UseAA-LABEL: @test-struct_2(
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; CHECK-UseAA: getelementptr i8* %{{[a-zA-Z0-9]+}}, i64 -40
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; Test that when a index is added from two constant, SeparateConstOffsetFromGEP
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; pass does not generate incorrect result.
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define void @test_const_add([3 x i32]* %in) {
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%inc = add nsw i32 2, 1
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%idxprom = sext i32 %inc to i64
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%arrayidx = getelementptr [3 x i32]* %in, i64 %idxprom, i64 2
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store i32 0, i32* %arrayidx, align 4
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ret void
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}
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; CHECK-LABEL: test_const_add:
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; CHECK: li [[REG:[0-9]+]], 0
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; CHECK: stw [[REG]], 44(3)
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; CHECK: blr
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