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synced 2024-08-17 05:29:24 +00:00
Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56683 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -118,6 +118,10 @@ class MachineFrameInfo {
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///
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bool HasVarSizedObjects;
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/// FrameAddressTaken - This boolean keeps track of whether there is a call
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/// to builtin @llvm.frameaddress.
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bool FrameAddressTaken;
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/// StackSize - The prolog/epilog code inserter calculates the final stack
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/// offsets for all of the fixed size objects, updating the Objects list
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/// above. It then updates StackSize to contain the number of bytes that need
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@ -174,6 +178,7 @@ public:
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MachineFrameInfo(const TargetFrameInfo &tfi) : TFI(tfi) {
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StackSize = NumFixedObjects = OffsetAdjustment = MaxAlignment = 0;
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HasVarSizedObjects = false;
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FrameAddressTaken = false;
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HasCalls = false;
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MaxCallFrameSize = 0;
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MMI = 0;
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@ -190,6 +195,12 @@ public:
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///
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bool hasVarSizedObjects() const { return HasVarSizedObjects; }
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/// isFrameAddressTaken - This method may be called any time after instruction
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/// selection is complete to determine if there is a call to
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/// @llvm.frameaddress in this function.
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bool isFrameAddressTaken() const { return FrameAddressTaken; }
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void setFrameAddressIsTaken(bool T) { FrameAddressTaken = T; }
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/// getObjectIndexBegin - Return the minimum frame object index...
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///
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int getObjectIndexBegin() const { return -NumFixedObjects; }
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@ -3483,10 +3483,13 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
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setValue(&I, DAG.getNode(ISD::RETURNADDR, TLI.getPointerTy(),
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getValue(I.getOperand(1))));
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return 0;
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case Intrinsic::frameaddress:
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case Intrinsic::frameaddress: {
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MachineFrameInfo *MFI = CurMBB->getParent()->getFrameInfo();
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MFI->setFrameAddressIsTaken(true);
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setValue(&I, DAG.getNode(ISD::FRAMEADDR, TLI.getPointerTy(),
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getValue(I.getOperand(1))));
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return 0;
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}
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case Intrinsic::setjmp:
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return "_setjmp"+!TLI.usesUnderscoreSetJmp();
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break;
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@ -209,7 +209,9 @@ ARMRegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const {
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/// or if frame pointer elimination is disabled.
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///
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bool ARMRegisterInfo::hasFP(const MachineFunction &MF) const {
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return NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects();
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return NoFramePointerElim || MFI->hasVarSizedObjects() ||
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MFI->isFrameAddressTaken();
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}
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// hasReservedCallFrame - Under normal circumstances, when a frame pointer is
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@ -104,7 +104,7 @@ BitVector AlphaRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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//
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bool AlphaRegisterInfo::hasFP(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return MFI->hasVarSizedObjects();
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return MFI->hasVarSizedObjects() || MFI->isFrameAddressTaken();
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}
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void AlphaRegisterInfo::
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@ -294,7 +294,8 @@ BitVector SPURegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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//
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static bool needsFP(const MachineFunction &MF) {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return NoFramePointerElim || MFI->hasVarSizedObjects();
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return NoFramePointerElim || MFI->hasVarSizedObjects() ||
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MFI->isFrameAddressTaken();
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}
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//--------------------------------------------------------------------------
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@ -75,7 +75,9 @@ BitVector IA64RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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// if frame pointer elimination is disabled.
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//
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bool IA64RegisterInfo::hasFP(const MachineFunction &MF) const {
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return NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects();
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return NoFramePointerElim || MFI->hasVarSizedObjects() ||
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MFI->isFrameAddressTaken();
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}
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void IA64RegisterInfo::
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@ -324,7 +324,9 @@ void MipsRegisterInfo::adjustMipsStackFrame(MachineFunction &MF) const
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// if frame pointer elimination is disabled.
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bool MipsRegisterInfo::
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hasFP(const MachineFunction &MF) const {
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return (NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects());
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return NoFramePointerElim || MFI->hasVarSizedObjects() ||
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MFI->isFrameAddressTaken();
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}
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// This function eliminate ADJCALLSTACKDOWN,
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@ -333,6 +333,7 @@ PPCRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
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static bool needsFP(const MachineFunction &MF) {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return NoFramePointerElim || MFI->hasVarSizedObjects() ||
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MFI->isFrameAddressTaken() ||
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(PerformTailCallOpt && MF.getInfo<PPCFunctionInfo>()->hasFastCall());
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}
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@ -5645,13 +5645,13 @@ SDValue X86TargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) {
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}
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SDValue X86TargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) {
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// Depths > 0 not supported yet!
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if (cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue() > 0)
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return SDValue();
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SDValue RetAddrFI = getReturnAddressFrameIndex(DAG);
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return DAG.getNode(ISD::SUB, getPointerTy(), RetAddrFI,
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DAG.getIntPtrConstant(TD->getPointerSize()));
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unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
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unsigned FrameReg = Subtarget->is64Bit() ? X86::RBP : X86::EBP;
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SDValue FrameAddr = DAG.getRegister(FrameReg, getPointerTy());
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while (Depth--)
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FrameAddr = DAG.getLoad(getPointerTy(), DAG.getEntryNode(), FrameAddr,
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NULL, 0);
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return FrameAddr;
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}
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SDValue X86TargetLowering::LowerFRAME_TO_ARGS_OFFSET(SDValue Op,
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@ -299,6 +299,7 @@ bool X86RegisterInfo::hasFP(const MachineFunction &MF) const {
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return (NoFramePointerElim ||
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needsStackRealignment(MF) ||
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MFI->hasVarSizedObjects() ||
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MFI->isFrameAddressTaken() ||
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MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() ||
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(MMI && MMI->callsUnwindInit()));
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}
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@ -1,7 +1,6 @@
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; RUN: llvm-as < %s | llc -march=x86-64 | grep {leaq -8(%rsp), %rax}
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@llvm.noinline = appending global [1 x i8*] [ i8* bitcast (i64* ()* @stack_end_address to i8*) ], section "llvm.metadata"
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; RUN: llvm-as < %s | llc -march=x86-64 | grep movq | grep rbp
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define internal i64* @stack_end_address() nounwind {
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define i64* @stack_end_address() nounwind {
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entry:
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tail call i8* @llvm.frameaddress( i32 0 )
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bitcast i8* %0 to i64*
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9
test/CodeGen/X86/x86-frameaddr.ll
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9
test/CodeGen/X86/x86-frameaddr.ll
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@ -0,0 +1,9 @@
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; RUN: llvm-as < %s | llc -march=x86 | grep mov | grep ebp
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define i8* @t() nounwind {
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entry:
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%0 = tail call i8* @llvm.frameaddress(i32 0)
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ret i8* %0
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}
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declare i8* @llvm.frameaddress(i32) nounwind readnone
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test/CodeGen/X86/x86-frameaddr2.ll
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9
test/CodeGen/X86/x86-frameaddr2.ll
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@ -0,0 +1,9 @@
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; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 3
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define i8* @t() nounwind {
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entry:
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%0 = tail call i8* @llvm.frameaddress(i32 2)
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ret i8* %0
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}
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declare i8* @llvm.frameaddress(i32) nounwind readnone
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