mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-28 06:58:19 +00:00
Simplify and rearrange long shift code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17861 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
ced6222bc5
commit
36c625d3a5
@ -2979,23 +2979,28 @@ void X86ISel::emitShiftOperation(MachineBasicBlock *MBB,
|
|||||||
DestReg).addReg(SrcReg ).addReg(SrcReg+1).addImm(Amount);
|
DestReg).addReg(SrcReg ).addReg(SrcReg+1).addImm(Amount);
|
||||||
BuildMI(*MBB, IP, Opc[2],2,DestReg+1).addReg(SrcReg+1).addImm(Amount);
|
BuildMI(*MBB, IP, Opc[2],2,DestReg+1).addReg(SrcReg+1).addImm(Amount);
|
||||||
}
|
}
|
||||||
|
} else if (Amount == 32) {
|
||||||
|
if (isLeftShift) {
|
||||||
|
BuildMI(*MBB, IP, X86::MOV32rr, 1, DestReg+1).addReg(SrcReg);
|
||||||
|
BuildMI(*MBB, IP, X86::MOV32ri, 1, DestReg).addImm(0);
|
||||||
|
} else {
|
||||||
|
BuildMI(*MBB, IP, X86::MOV32rr, 1, DestReg).addReg(SrcReg);
|
||||||
|
if (!isSigned) {
|
||||||
|
BuildMI(*MBB, IP, X86::MOV32ri, 1, DestReg+1).addImm(0);
|
||||||
|
} else {
|
||||||
|
BuildMI(*MBB, IP, X86::SAR32ri, 2,
|
||||||
|
DestReg+1).addReg(SrcReg).addImm(31);
|
||||||
|
}
|
||||||
|
}
|
||||||
} else { // Shifting more than 32 bits
|
} else { // Shifting more than 32 bits
|
||||||
Amount -= 32;
|
Amount -= 32;
|
||||||
if (isLeftShift) {
|
if (isLeftShift) {
|
||||||
if (Amount != 0) {
|
BuildMI(*MBB, IP, X86::SHL32ri, 2,
|
||||||
BuildMI(*MBB, IP, X86::SHL32ri, 2,
|
DestReg + 1).addReg(SrcReg).addImm(Amount);
|
||||||
DestReg + 1).addReg(SrcReg).addImm(Amount);
|
|
||||||
} else {
|
|
||||||
BuildMI(*MBB, IP, X86::MOV32rr, 1, DestReg+1).addReg(SrcReg);
|
|
||||||
}
|
|
||||||
BuildMI(*MBB, IP, X86::MOV32ri, 1, DestReg).addImm(0);
|
BuildMI(*MBB, IP, X86::MOV32ri, 1, DestReg).addImm(0);
|
||||||
} else {
|
} else {
|
||||||
if (Amount != 0) {
|
BuildMI(*MBB, IP, isSigned ? X86::SAR32ri : X86::SHR32ri, 2,
|
||||||
BuildMI(*MBB, IP, isSigned ? X86::SAR32ri : X86::SHR32ri, 2,
|
DestReg).addReg(SrcReg+1).addImm(Amount);
|
||||||
DestReg).addReg(SrcReg+1).addImm(Amount);
|
|
||||||
} else {
|
|
||||||
BuildMI(*MBB, IP, X86::MOV32rr, 1, DestReg).addReg(SrcReg+1);
|
|
||||||
}
|
|
||||||
BuildMI(*MBB, IP, X86::MOV32ri, 1, DestReg+1).addImm(0);
|
BuildMI(*MBB, IP, X86::MOV32ri, 1, DestReg+1).addImm(0);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user