mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-02-12 03:32:10 +00:00
Register Mos6502 target
Also add mos6502 subtargets on Triple class
This commit is contained in:
Damián Silvani
parent
642eccbb21
commit
36ee8fe697
@ -189,6 +189,7 @@ set(LLVM_ALL_TARGETS
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SystemZ
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X86
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XCore
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Mos6502
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)
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# List of targets with JIT support:
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@ -362,6 +362,8 @@ elseif (LLVM_NATIVE_ARCH MATCHES "wasm32")
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set(LLVM_NATIVE_ARCH WebAssembly)
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elseif (LLVM_NATIVE_ARCH MATCHES "wasm64")
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set(LLVM_NATIVE_ARCH WebAssembly)
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elseif (LLVM_NATIVE_ARCH MATCHES "mos6502")
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set(LLVM_NATIVE_ARCH Mos6502)
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else ()
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message(FATAL_ERROR "Unknown architecture ${LLVM_NATIVE_ARCH}")
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endif ()
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@ -17,6 +17,7 @@
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#undef NetBSD
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#undef mips
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#undef sparc
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#undef mos6502
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namespace llvm {
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@ -66,6 +67,9 @@ public:
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sparc, // Sparc: sparc
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sparcv9, // Sparcv9: Sparcv9
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sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant
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mos6502, // Mos6502: mos6502
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mos6502v9, // Mos6502v9: Sparcv9
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mos6502el, // Mos6502: (endianness = little). NB: 'Mos6502le' is a CPU variant
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systemz, // SystemZ: s390x
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tce, // TCE (http://tce.cs.tut.fi/): tce
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thumb, // Thumb (little endian): thumb, thumbv.*
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@ -348,6 +348,8 @@ void MCObjectFileInfo::initELFMCObjectFileInfo(Triple T) {
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break;
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case Triple::sparcel:
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case Triple::sparc:
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case Triple::mos6502el:
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case Triple::mos6502:
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if (RelocM == Reloc::PIC_) {
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LSDAEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4;
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PersonalityEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |
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@ -361,6 +363,7 @@ void MCObjectFileInfo::initELFMCObjectFileInfo(Triple T) {
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}
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break;
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case Triple::sparcv9:
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case Triple::mos6502v9:
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LSDAEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4;
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if (RelocM == Reloc::PIC_) {
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PersonalityEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |
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@ -41,6 +41,9 @@ const char *Triple::getArchTypeName(ArchType Kind) {
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case sparc: return "sparc";
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case sparcv9: return "sparcv9";
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case sparcel: return "sparcel";
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case mos6502: return "mos6502";
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case mos6502v9: return "mos6502v9";
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case mos6502el: return "mos6502el";
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case systemz: return "s390x";
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case tce: return "tce";
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case thumb: return "thumb";
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@ -101,6 +104,10 @@ const char *Triple::getArchTypePrefix(ArchType Kind) {
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case sparcel:
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case sparc: return "sparc";
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case mos6502v9:
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case mos6502el:
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case mos6502: return "mos6502";
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case systemz: return "s390";
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case x86:
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@ -241,6 +248,9 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
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.Case("sparc", sparc)
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.Case("sparcel", sparcel)
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.Case("sparcv9", sparcv9)
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.Case("mos6502", mos6502)
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.Case("mos6502el", mos6502el)
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.Case("mos6502v9", mos6502v9)
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.Case("systemz", systemz)
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.Case("tce", tce)
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.Case("thumb", thumb)
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@ -353,6 +363,9 @@ static Triple::ArchType parseArch(StringRef ArchName) {
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.Case("sparc", Triple::sparc)
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.Case("sparcel", Triple::sparcel)
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.Cases("sparcv9", "sparc64", Triple::sparcv9)
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.Case("mos6502", Triple::mos6502)
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.Case("mos6502el", Triple::mos6502el)
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.Cases("mos6502v9", "mos650264", Triple::mos6502v9)
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.Case("tce", Triple::tce)
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.Case("xcore", Triple::xcore)
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.Case("nvptx", Triple::nvptx)
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@ -527,6 +540,8 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) {
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case Triple::amdgcn:
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case Triple::sparc:
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case Triple::sparcv9:
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case Triple::mos6502:
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case Triple::mos6502v9:
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case Triple::systemz:
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case Triple::xcore:
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case Triple::ppc64le:
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@ -1009,6 +1024,8 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
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case llvm::Triple::r600:
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case llvm::Triple::sparc:
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case llvm::Triple::sparcel:
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case llvm::Triple::mos6502:
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case llvm::Triple::mos6502el:
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case llvm::Triple::tce:
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case llvm::Triple::thumb:
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case llvm::Triple::thumbeb:
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@ -1034,6 +1051,7 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
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case llvm::Triple::ppc64:
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case llvm::Triple::ppc64le:
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case llvm::Triple::sparcv9:
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case llvm::Triple::mos6502v9:
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case llvm::Triple::systemz:
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case llvm::Triple::x86_64:
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case llvm::Triple::amdil64:
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@ -1087,6 +1105,8 @@ Triple Triple::get32BitArchVariant() const {
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case Triple::r600:
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case Triple::sparc:
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case Triple::sparcel:
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case Triple::mos6502:
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case Triple::mos6502el:
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case Triple::tce:
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case Triple::thumb:
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case Triple::thumbeb:
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@ -1103,6 +1123,7 @@ Triple Triple::get32BitArchVariant() const {
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case Triple::nvptx64: T.setArch(Triple::nvptx); break;
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case Triple::ppc64: T.setArch(Triple::ppc); break;
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case Triple::sparcv9: T.setArch(Triple::sparc); break;
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case Triple::mos6502v9: T.setArch(Triple::mos6502); break;
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case Triple::x86_64: T.setArch(Triple::x86); break;
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case Triple::amdil64: T.setArch(Triple::amdil); break;
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case Triple::hsail64: T.setArch(Triple::hsail); break;
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@ -1127,6 +1148,7 @@ Triple Triple::get64BitArchVariant() const {
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case Triple::thumbeb:
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case Triple::xcore:
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case Triple::sparcel:
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case Triple::mos6502el:
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case Triple::shave:
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T.setArch(UnknownArch);
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break;
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@ -1146,6 +1168,7 @@ Triple Triple::get64BitArchVariant() const {
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case Triple::ppc64:
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case Triple::ppc64le:
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case Triple::sparcv9:
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case Triple::mos6502v9:
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case Triple::systemz:
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case Triple::x86_64:
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case Triple::wasm64:
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@ -1158,6 +1181,7 @@ Triple Triple::get64BitArchVariant() const {
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case Triple::nvptx: T.setArch(Triple::nvptx64); break;
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case Triple::ppc: T.setArch(Triple::ppc64); break;
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case Triple::sparc: T.setArch(Triple::sparcv9); break;
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case Triple::mos6502: T.setArch(Triple::mos6502v9); break;
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case Triple::x86: T.setArch(Triple::x86_64); break;
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case Triple::amdil: T.setArch(Triple::amdil64); break;
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case Triple::hsail: T.setArch(Triple::hsail64); break;
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@ -1209,6 +1233,8 @@ Triple Triple::getBigEndianArchVariant() const {
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case Triple::ppc:
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case Triple::sparc:
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case Triple::sparcv9:
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case Triple::mos6502:
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case Triple::mos6502v9:
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case Triple::systemz:
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case Triple::tce:
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case Triple::thumbeb:
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@ -1221,6 +1247,7 @@ Triple Triple::getBigEndianArchVariant() const {
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case Triple::mipsel: T.setArch(Triple::mips); break;
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case Triple::ppc64le: T.setArch(Triple::ppc64); break;
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case Triple::sparcel: T.setArch(Triple::sparc); break;
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case Triple::mos6502el: T.setArch(Triple::mos6502); break;
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}
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return T;
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}
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@ -1231,6 +1258,7 @@ Triple Triple::getLittleEndianArchVariant() const {
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case Triple::UnknownArch:
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case Triple::ppc:
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case Triple::sparcv9:
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case Triple::mos6502v9:
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case Triple::systemz:
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case Triple::tce:
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@ -1262,6 +1290,7 @@ Triple Triple::getLittleEndianArchVariant() const {
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case Triple::r600:
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case Triple::shave:
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case Triple::sparcel:
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case Triple::mos6502el:
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case Triple::spir64:
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case Triple::spir:
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case Triple::thumb:
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@ -1279,6 +1308,7 @@ Triple Triple::getLittleEndianArchVariant() const {
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case Triple::mips: T.setArch(Triple::mipsel); break;
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case Triple::ppc64: T.setArch(Triple::ppc64le); break;
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case Triple::sparc: T.setArch(Triple::sparcel); break;
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case Triple::mos6502: T.setArch(Triple::mos6502el); break;
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}
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return T;
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}
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@ -34,6 +34,7 @@ subdirectories =
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WebAssembly
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X86
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XCore
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Mos6502
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; This is a special group whose required libraries are extended (by llvm-build)
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; with the best execution engine (the native JIT, if available, or the
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