Register Mos6502 target

Also add mos6502 subtargets on Triple class

CMakeLists.txt

@@ -189,6 +189,7 @@ set(LLVM_ALL_TARGETS
   SystemZ
   X86
   XCore
+  Mos6502
   )
 
 # List of targets with JIT support:

cmake/config-ix.cmake

@@ -362,6 +362,8 @@ elseif (LLVM_NATIVE_ARCH MATCHES "wasm32")
   set(LLVM_NATIVE_ARCH WebAssembly)
 elseif (LLVM_NATIVE_ARCH MATCHES "wasm64")
   set(LLVM_NATIVE_ARCH WebAssembly)
+elseif (LLVM_NATIVE_ARCH MATCHES "mos6502")
+  set(LLVM_NATIVE_ARCH Mos6502)
 else ()
   message(FATAL_ERROR "Unknown architecture ${LLVM_NATIVE_ARCH}")
 endif ()

include/llvm/ADT/Triple.h

@@ -17,6 +17,7 @@
 #undef NetBSD
 #undef mips
 #undef sparc
+#undef mos6502
 
 namespace llvm {
 
@@ -66,6 +67,9 @@ public:
     sparc,      // Sparc: sparc
     sparcv9,    // Sparcv9: Sparcv9
     sparcel,    // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant
+    mos6502,    // Mos6502: mos6502
+    mos6502v9,  // Mos6502v9: Sparcv9
+    mos6502el,  // Mos6502: (endianness = little). NB: 'Mos6502le' is a CPU variant
     systemz,    // SystemZ: s390x
     tce,        // TCE (http://tce.cs.tut.fi/): tce
     thumb,      // Thumb (little endian): thumb, thumbv.*

lib/MC/MCObjectFileInfo.cpp

@@ -348,6 +348,8 @@ void MCObjectFileInfo::initELFMCObjectFileInfo(Triple T) {
     break;
   case Triple::sparcel:
   case Triple::sparc:
+  case Triple::mos6502el:
+  case Triple::mos6502:
     if (RelocM == Reloc::PIC_) {
       LSDAEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4;
       PersonalityEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |
@@ -361,6 +363,7 @@ void MCObjectFileInfo::initELFMCObjectFileInfo(Triple T) {
     }
     break;
   case Triple::sparcv9:
+  case Triple::mos6502v9:
     LSDAEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4;
     if (RelocM == Reloc::PIC_) {
       PersonalityEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |

lib/Support/Triple.cpp

@@ -41,6 +41,9 @@ const char *Triple::getArchTypeName(ArchType Kind) {
   case sparc:       return "sparc";
   case sparcv9:     return "sparcv9";
   case sparcel:     return "sparcel";
+  case mos6502:     return "mos6502";
+  case mos6502v9:   return "mos6502v9";
+  case mos6502el:   return "mos6502el";
   case systemz:     return "s390x";
   case tce:         return "tce";
   case thumb:       return "thumb";
@@ -101,6 +104,10 @@ const char *Triple::getArchTypePrefix(ArchType Kind) {
   case sparcel:
   case sparc:       return "sparc";
 
+  case mos6502v9:
+  case mos6502el:
+  case mos6502:       return "mos6502";
+
   case systemz:     return "s390";
 
   case x86:
@@ -241,6 +248,9 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
     .Case("sparc", sparc)
     .Case("sparcel", sparcel)
     .Case("sparcv9", sparcv9)
+    .Case("mos6502", mos6502)
+    .Case("mos6502el", mos6502el)
+    .Case("mos6502v9", mos6502v9)
     .Case("systemz", systemz)
     .Case("tce", tce)
     .Case("thumb", thumb)
@@ -353,6 +363,9 @@ static Triple::ArchType parseArch(StringRef ArchName) {
     .Case("sparc", Triple::sparc)
     .Case("sparcel", Triple::sparcel)
     .Cases("sparcv9", "sparc64", Triple::sparcv9)
+    .Case("mos6502", Triple::mos6502)
+    .Case("mos6502el", Triple::mos6502el)
+    .Cases("mos6502v9", "mos650264", Triple::mos6502v9)
     .Case("tce", Triple::tce)
     .Case("xcore", Triple::xcore)
     .Case("nvptx", Triple::nvptx)
@@ -527,6 +540,8 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) {
   case Triple::amdgcn:
   case Triple::sparc:
   case Triple::sparcv9:
+  case Triple::mos6502:
+  case Triple::mos6502v9:
   case Triple::systemz:
   case Triple::xcore:
   case Triple::ppc64le:
@@ -1009,6 +1024,8 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
   case llvm::Triple::r600:
   case llvm::Triple::sparc:
   case llvm::Triple::sparcel:
+  case llvm::Triple::mos6502:
+  case llvm::Triple::mos6502el:
   case llvm::Triple::tce:
   case llvm::Triple::thumb:
   case llvm::Triple::thumbeb:
@@ -1034,6 +1051,7 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
   case llvm::Triple::ppc64:
   case llvm::Triple::ppc64le:
   case llvm::Triple::sparcv9:
+  case llvm::Triple::mos6502v9:
   case llvm::Triple::systemz:
   case llvm::Triple::x86_64:
   case llvm::Triple::amdil64:
@@ -1087,6 +1105,8 @@ Triple Triple::get32BitArchVariant() const {
   case Triple::r600:
   case Triple::sparc:
   case Triple::sparcel:
+  case Triple::mos6502:
+  case Triple::mos6502el:
   case Triple::tce:
   case Triple::thumb:
   case Triple::thumbeb:
@@ -1103,6 +1123,7 @@ Triple Triple::get32BitArchVariant() const {
   case Triple::nvptx64:   T.setArch(Triple::nvptx);   break;
   case Triple::ppc64:     T.setArch(Triple::ppc);     break;
   case Triple::sparcv9:   T.setArch(Triple::sparc);   break;
+  case Triple::mos6502v9: T.setArch(Triple::mos6502); break;
   case Triple::x86_64:    T.setArch(Triple::x86);     break;
   case Triple::amdil64:   T.setArch(Triple::amdil);   break;
   case Triple::hsail64:   T.setArch(Triple::hsail);   break;
@@ -1127,6 +1148,7 @@ Triple Triple::get64BitArchVariant() const {
   case Triple::thumbeb:
   case Triple::xcore:
   case Triple::sparcel:
+  case Triple::mos6502el:
   case Triple::shave:
     T.setArch(UnknownArch);
     break;
@@ -1146,6 +1168,7 @@ Triple Triple::get64BitArchVariant() const {
   case Triple::ppc64:
   case Triple::ppc64le:
   case Triple::sparcv9:
+  case Triple::mos6502v9:
   case Triple::systemz:
   case Triple::x86_64:
   case Triple::wasm64:
@@ -1158,6 +1181,7 @@ Triple Triple::get64BitArchVariant() const {
   case Triple::nvptx:   T.setArch(Triple::nvptx64);   break;
   case Triple::ppc:     T.setArch(Triple::ppc64);     break;
   case Triple::sparc:   T.setArch(Triple::sparcv9);   break;
+  case Triple::mos6502: T.setArch(Triple::mos6502v9); break;
   case Triple::x86:     T.setArch(Triple::x86_64);    break;
   case Triple::amdil:   T.setArch(Triple::amdil64);   break;
   case Triple::hsail:   T.setArch(Triple::hsail64);   break;
@@ -1209,6 +1233,8 @@ Triple Triple::getBigEndianArchVariant() const {
   case Triple::ppc:
   case Triple::sparc:
   case Triple::sparcv9:
+  case Triple::mos6502:
+  case Triple::mos6502v9:
   case Triple::systemz:
   case Triple::tce:
   case Triple::thumbeb:
@@ -1221,6 +1247,7 @@ Triple Triple::getBigEndianArchVariant() const {
   case Triple::mipsel:  T.setArch(Triple::mips);       break;
   case Triple::ppc64le: T.setArch(Triple::ppc64);      break;
   case Triple::sparcel: T.setArch(Triple::sparc);      break;
+  case Triple::mos6502el: T.setArch(Triple::mos6502);  break;
   }
   return T;
 }
@@ -1231,6 +1258,7 @@ Triple Triple::getLittleEndianArchVariant() const {
   case Triple::UnknownArch:
   case Triple::ppc:
   case Triple::sparcv9:
+  case Triple::mos6502v9:
   case Triple::systemz:
   case Triple::tce:
 
@@ -1262,6 +1290,7 @@ Triple Triple::getLittleEndianArchVariant() const {
   case Triple::r600:
   case Triple::shave:
   case Triple::sparcel:
+  case Triple::mos6502el:
   case Triple::spir64:
   case Triple::spir:
   case Triple::thumb:
@@ -1279,6 +1308,7 @@ Triple Triple::getLittleEndianArchVariant() const {
   case Triple::mips:       T.setArch(Triple::mipsel);   break;
   case Triple::ppc64:      T.setArch(Triple::ppc64le);  break;
   case Triple::sparc:      T.setArch(Triple::sparcel);  break;
+  case Triple::mos6502:    T.setArch(Triple::mos6502el);  break;
   }
   return T;
 }

lib/Target/LLVMBuild.txt

@@ -34,6 +34,7 @@ subdirectories =
  WebAssembly
  X86
  XCore
+ Mos6502
 
 ; This is a special group whose required libraries are extended (by llvm-build)
 ; with the best execution engine (the native JIT, if available, or the