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Replace X86's CanRematLoadWithDispOperand by calling the target-independent
MachineInstr::isInvariantLoad instead, which has the benefit of being more complete. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83696 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -107,7 +107,7 @@ public:
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AliasAnalysis *AA = 0) const {
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return MI->getOpcode() == IMPLICIT_DEF ||
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(MI->getDesc().isRematerializable() &&
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(isReallyTriviallyReMaterializable(MI) ||
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(isReallyTriviallyReMaterializable(MI, AA) ||
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isReallyTriviallyReMaterializableGeneric(MI, AA)));
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}
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@ -118,7 +118,8 @@ protected:
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/// taking into consideration its operands. This predicate must return false
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/// if the instruction has any side effects other than producing a value, or
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/// if it requres any address registers that are not always available.
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virtual bool isReallyTriviallyReMaterializable(const MachineInstr *MI) const {
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virtual bool isReallyTriviallyReMaterializable(const MachineInstr *MI,
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AliasAnalysis *AA) const {
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return false;
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}
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@ -782,31 +782,9 @@ static bool regIsPICBase(unsigned BaseReg, const MachineRegisterInfo &MRI) {
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return isPICBase;
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}
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/// CanRematLoadWithDispOperand - Return true if a load with the specified
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/// operand is a candidate for remat: for this to be true we need to know that
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/// the load will always return the same value, even if moved.
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static bool CanRematLoadWithDispOperand(const MachineOperand &MO,
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X86TargetMachine &TM) {
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// Loads from constant pool entries can be remat'd.
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if (MO.isCPI()) return true;
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// We can remat globals in some cases.
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if (MO.isGlobal()) {
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// If this is a load of a stub, not of the global, we can remat it. This
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// access will always return the address of the global.
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if (isGlobalStubReference(MO.getTargetFlags()))
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return true;
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// If the global itself is constant, we can remat the load.
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if (GlobalVariable *GV = dyn_cast<GlobalVariable>(MO.getGlobal()))
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if (GV->isConstant())
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return true;
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}
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return false;
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}
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bool
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X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI) const {
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X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI,
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AliasAnalysis *AA) const {
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switch (MI->getOpcode()) {
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default: break;
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case X86::MOV8rm:
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@ -825,7 +803,7 @@ X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI) const {
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if (MI->getOperand(1).isReg() &&
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MI->getOperand(2).isImm() &&
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MI->getOperand(3).isReg() && MI->getOperand(3).getReg() == 0 &&
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CanRematLoadWithDispOperand(MI->getOperand(4), TM)) {
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MI->isInvariantLoad(AA)) {
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unsigned BaseReg = MI->getOperand(1).getReg();
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if (BaseReg == 0 || BaseReg == X86::RIP)
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return true;
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@ -451,7 +451,8 @@ public:
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unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
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unsigned isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const;
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bool isReallyTriviallyReMaterializable(const MachineInstr *MI) const;
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bool isReallyTriviallyReMaterializable(const MachineInstr *MI,
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AliasAnalysis *AA) const;
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void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
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unsigned DestReg, unsigned SubIdx,
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const MachineInstr *Orig) const;
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