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[DAG] Improved target independent vector shuffle folding logic.
This patch teaches the DAGCombiner how to combine shuffles according to rules: shuffle(shuffle(A, Undef, M0), B, M1) -> shuffle(B, A, M2) shuffle(shuffle(A, B, M0), B, M1) -> shuffle(B, A, M2) shuffle(shuffle(A, B, M0), A, M1) -> shuffle(B, A, M2) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222090 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -11239,6 +11239,26 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) {
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return DAG.getVectorShuffle(VT, SDLoc(N), SV0, N1, &Mask[0]);
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return DAG.getVectorShuffle(VT, SDLoc(N), SV0, SV1, &Mask[0]);
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}
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// Compute the commuted shuffle mask.
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for (unsigned i = 0; i != NumElts; ++i) {
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int idx = Mask[i];
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if (idx < 0)
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continue;
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else if (idx < (int)NumElts)
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Mask[i] = idx + NumElts;
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else
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Mask[i] = idx - NumElts;
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}
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if (TLI.isShuffleMaskLegal(Mask, VT)) {
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if (IsSV1Undef)
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// shuffle(shuffle(A, Undef, M0), B, M1) -> shuffle(B, A, M2)
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return DAG.getVectorShuffle(VT, SDLoc(N), N1, SV0, &Mask[0]);
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// shuffle(shuffle(A, B, M0), B, M1) -> shuffle(B, A, M2)
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// shuffle(shuffle(A, B, M0), A, M1) -> shuffle(B, A, M2)
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return DAG.getVectorShuffle(VT, SDLoc(N), SV1, SV0, &Mask[0]);
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}
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}
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return SDValue();
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