Merging r205067:

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r205067 | ahatanaka | 2014-03-28 19:28:07 -0400 (Fri, 28 Mar 2014) | 7 lines

[x86] Fix printing of register operands with q modifier.

Emit 32-bit register names instead of 64-bit register names if the target does
not have 64-bit general purpose registers.

<rdar://problem/14653996>

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@206055 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard 2014-04-11 19:35:44 +00:00
parent 644b118230
commit 3830243b55
2 changed files with 17 additions and 3 deletions

View File

@ -393,9 +393,11 @@ bool X86AsmPrinter::printAsmMRegister(const MachineOperand &MO, char Mode,
case 'k': // Print SImode register
Reg = getX86SubSuperRegister(Reg, MVT::i32);
break;
case 'q': // Print DImode register
// FIXME: gcc will actually print e instead of r for 32-bit.
Reg = getX86SubSuperRegister(Reg, MVT::i64);
case 'q':
// Print 64-bit register names if 64-bit integer registers are available.
// Otherwise, print 32-bit register names.
MVT::SimpleValueType Ty = Subtarget->is64Bit() ? MVT::i64 : MVT::i32;
Reg = getX86SubSuperRegister(Reg, Ty);
break;
}

View File

@ -0,0 +1,12 @@
; RUN: llc < %s -march=x86 | FileCheck %s
; If the target does not have 64-bit integer registers, emit 32-bit register
; names.
; CHECK: movq (%e{{[abcd]}}x, %ebx, 4)
define void @q_modifier(i32* %p) {
entry:
tail call void asm sideeffect "movq (${0:q}, %ebx, 4), %mm0", "r,~{dirflag},~{fpsr},~{flags}"(i32* %p)
ret void
}