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Merging r205067:
------------------------------------------------------------------------ r205067 | ahatanaka | 2014-03-28 19:28:07 -0400 (Fri, 28 Mar 2014) | 7 lines [x86] Fix printing of register operands with q modifier. Emit 32-bit register names instead of 64-bit register names if the target does not have 64-bit general purpose registers. <rdar://problem/14653996> ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@206055 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -393,9 +393,11 @@ bool X86AsmPrinter::printAsmMRegister(const MachineOperand &MO, char Mode,
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case 'k': // Print SImode register
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Reg = getX86SubSuperRegister(Reg, MVT::i32);
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break;
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case 'q': // Print DImode register
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// FIXME: gcc will actually print e instead of r for 32-bit.
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Reg = getX86SubSuperRegister(Reg, MVT::i64);
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case 'q':
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// Print 64-bit register names if 64-bit integer registers are available.
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// Otherwise, print 32-bit register names.
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MVT::SimpleValueType Ty = Subtarget->is64Bit() ? MVT::i64 : MVT::i32;
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Reg = getX86SubSuperRegister(Reg, Ty);
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break;
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}
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12
test/CodeGen/X86/inline-asm-modifier-q.ll
Normal file
12
test/CodeGen/X86/inline-asm-modifier-q.ll
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@ -0,0 +1,12 @@
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; RUN: llc < %s -march=x86 | FileCheck %s
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; If the target does not have 64-bit integer registers, emit 32-bit register
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; names.
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; CHECK: movq (%e{{[abcd]}}x, %ebx, 4)
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define void @q_modifier(i32* %p) {
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entry:
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tail call void asm sideeffect "movq (${0:q}, %ebx, 4), %mm0", "r,~{dirflag},~{fpsr},~{flags}"(i32* %p)
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ret void
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}
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