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APInt'fy SimplifyDemandedVectorElts so it can analyze vectors with more than 64 elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63631 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -352,8 +352,8 @@ namespace {
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/// properties that allow us to simplify its operands.
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bool SimplifyDemandedInstructionBits(Instruction &Inst);
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Value *SimplifyDemandedVectorElts(Value *V, uint64_t DemandedElts,
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uint64_t &UndefElts, unsigned Depth = 0);
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Value *SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
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APInt& UndefElts, unsigned Depth = 0);
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// FoldOpIntoPhi - Given a binary operator or cast instruction which has a
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// PHI node as operand #0, see if we can fold the instruction into the PHI
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@ -1396,19 +1396,18 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
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/// SimplifyDemandedVectorElts - The specified value produces a vector with
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/// 64 or fewer elements. DemandedElts contains the set of elements that are
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/// any number of elements. DemandedElts contains the set of elements that are
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/// actually used by the caller. This method analyzes which elements of the
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/// operand are undef and returns that information in UndefElts.
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///
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/// If the information about demanded elements can be used to simplify the
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/// operation, the operation is simplified, then the resultant value is
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/// returned. This returns null if no change was made.
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Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, uint64_t DemandedElts,
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uint64_t &UndefElts,
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Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
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APInt& UndefElts,
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unsigned Depth) {
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unsigned VWidth = cast<VectorType>(V->getType())->getNumElements();
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assert(VWidth <= 64 && "Vector too wide to analyze!");
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uint64_t EltMask = ~0ULL >> (64-VWidth);
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APInt EltMask(APInt::getAllOnesValue(VWidth));
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assert((DemandedElts & ~EltMask) == 0 && "Invalid DemandedElts!");
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if (isa<UndefValue>(V)) {
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@ -1427,12 +1426,12 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, uint64_t DemandedElts,
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std::vector<Constant*> Elts;
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for (unsigned i = 0; i != VWidth; ++i)
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if (!(DemandedElts & (1ULL << i))) { // If not demanded, set to undef.
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if (!DemandedElts[i]) { // If not demanded, set to undef.
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Elts.push_back(Undef);
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UndefElts |= (1ULL << i);
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UndefElts.set(i);
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} else if (isa<UndefValue>(CP->getOperand(i))) { // Already undef.
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Elts.push_back(Undef);
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UndefElts |= (1ULL << i);
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UndefElts.set(i);
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} else { // Otherwise, defined.
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Elts.push_back(CP->getOperand(i));
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}
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@ -1453,8 +1452,10 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, uint64_t DemandedElts,
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Constant *Zero = Constant::getNullValue(EltTy);
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Constant *Undef = UndefValue::get(EltTy);
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std::vector<Constant*> Elts;
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for (unsigned i = 0; i != VWidth; ++i)
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Elts.push_back((DemandedElts & (1ULL << i)) ? Zero : Undef);
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for (unsigned i = 0; i != VWidth; ++i) {
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Constant *Elt = DemandedElts[i] ? Zero : Undef;
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Elts.push_back(Elt);
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}
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UndefElts = DemandedElts ^ EltMask;
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return ConstantVector::get(Elts);
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}
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@ -1482,7 +1483,7 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, uint64_t DemandedElts,
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if (!I) return false; // Only analyze instructions.
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bool MadeChange = false;
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uint64_t UndefElts2;
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APInt UndefElts2(VWidth, 0);
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Value *TmpV;
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switch (I->getOpcode()) {
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default: break;
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@ -1503,35 +1504,36 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, uint64_t DemandedElts,
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// If this is inserting an element that isn't demanded, remove this
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// insertelement.
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unsigned IdxNo = Idx->getZExtValue();
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if (IdxNo >= VWidth || (DemandedElts & (1ULL << IdxNo)) == 0)
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if (IdxNo >= VWidth || !DemandedElts[IdxNo])
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return AddSoonDeadInstToWorklist(*I, 0);
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// Otherwise, the element inserted overwrites whatever was there, so the
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// input demanded set is simpler than the output set.
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TmpV = SimplifyDemandedVectorElts(I->getOperand(0),
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DemandedElts & ~(1ULL << IdxNo),
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APInt DemandedElts2 = DemandedElts;
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DemandedElts2.clear(IdxNo);
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TmpV = SimplifyDemandedVectorElts(I->getOperand(0), DemandedElts2,
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UndefElts, Depth+1);
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if (TmpV) { I->setOperand(0, TmpV); MadeChange = true; }
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// The inserted element is defined.
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UndefElts &= ~(1ULL << IdxNo);
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UndefElts.clear(IdxNo);
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break;
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}
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case Instruction::ShuffleVector: {
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ShuffleVectorInst *Shuffle = cast<ShuffleVectorInst>(I);
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uint64_t LHSVWidth =
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cast<VectorType>(Shuffle->getOperand(0)->getType())->getNumElements();
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uint64_t LeftDemanded = 0, RightDemanded = 0;
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APInt LeftDemanded(LHSVWidth, 0), RightDemanded(LHSVWidth, 0);
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for (unsigned i = 0; i < VWidth; i++) {
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if (DemandedElts & (1ULL << i)) {
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if (DemandedElts[i]) {
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unsigned MaskVal = Shuffle->getMaskValue(i);
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if (MaskVal != -1u) {
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assert(MaskVal < LHSVWidth * 2 &&
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"shufflevector mask index out of range!");
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if (MaskVal < LHSVWidth)
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LeftDemanded |= 1ULL << MaskVal;
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LeftDemanded.set(MaskVal);
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else
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RightDemanded |= 1ULL << (MaskVal - LHSVWidth);
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RightDemanded.set(MaskVal - LHSVWidth);
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}
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}
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}
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@ -1540,7 +1542,7 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, uint64_t DemandedElts,
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UndefElts2, Depth+1);
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if (TmpV) { I->setOperand(0, TmpV); MadeChange = true; }
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uint64_t UndefElts3;
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APInt UndefElts3(VWidth, 0);
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TmpV = SimplifyDemandedVectorElts(I->getOperand(1), RightDemanded,
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UndefElts3, Depth+1);
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if (TmpV) { I->setOperand(1, TmpV); MadeChange = true; }
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@ -1549,16 +1551,17 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, uint64_t DemandedElts,
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for (unsigned i = 0; i < VWidth; i++) {
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unsigned MaskVal = Shuffle->getMaskValue(i);
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if (MaskVal == -1u) {
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uint64_t NewBit = 1ULL << i;
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UndefElts |= NewBit;
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UndefElts.set(i);
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} else if (MaskVal < LHSVWidth) {
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uint64_t NewBit = ((UndefElts2 >> MaskVal) & 1) << i;
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NewUndefElts |= NewBit;
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UndefElts |= NewBit;
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if (UndefElts2[MaskVal]) {
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NewUndefElts = true;
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UndefElts.set(i);
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}
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} else {
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uint64_t NewBit = ((UndefElts3 >> (MaskVal - LHSVWidth)) & 1) << i;
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NewUndefElts |= NewBit;
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UndefElts |= NewBit;
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if (UndefElts3[MaskVal - LHSVWidth]) {
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NewUndefElts = true;
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UndefElts.set(i);
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}
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}
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}
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@ -1566,7 +1569,7 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, uint64_t DemandedElts,
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// Add additional discovered undefs.
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std::vector<Constant*> Elts;
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for (unsigned i = 0; i < VWidth; ++i) {
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if (UndefElts & (1ULL << i))
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if (UndefElts[i])
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Elts.push_back(UndefValue::get(Type::Int32Ty));
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else
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Elts.push_back(ConstantInt::get(Type::Int32Ty,
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@ -1582,7 +1585,7 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, uint64_t DemandedElts,
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const VectorType *VTy = dyn_cast<VectorType>(I->getOperand(0)->getType());
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if (!VTy) break;
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unsigned InVWidth = VTy->getNumElements();
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uint64_t InputDemandedElts = 0;
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APInt InputDemandedElts(InVWidth, 0);
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unsigned Ratio;
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if (VWidth == InVWidth) {
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@ -1599,8 +1602,8 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, uint64_t DemandedElts,
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// elements are live.
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Ratio = VWidth/InVWidth;
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for (unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx) {
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if (DemandedElts & (1ULL << OutIdx))
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InputDemandedElts |= 1ULL << (OutIdx/Ratio);
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if (DemandedElts[OutIdx])
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InputDemandedElts.set(OutIdx/Ratio);
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}
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} else {
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// Untested so far.
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@ -1611,8 +1614,8 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, uint64_t DemandedElts,
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// live.
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Ratio = InVWidth/VWidth;
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for (unsigned InIdx = 0; InIdx != InVWidth; ++InIdx)
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if (DemandedElts & (1ULL << InIdx/Ratio))
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InputDemandedElts |= 1ULL << InIdx;
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if (DemandedElts[InIdx/Ratio])
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InputDemandedElts.set(InIdx);
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}
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// div/rem demand all inputs, because they don't want divide by zero.
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@ -1630,8 +1633,8 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, uint64_t DemandedElts,
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// then an output element is undef if the corresponding input element is
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// undef.
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for (unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
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if (UndefElts2 & (1ULL << (OutIdx/Ratio)))
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UndefElts |= 1ULL << OutIdx;
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if (UndefElts2[OutIdx/Ratio])
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UndefElts.set(OutIdx);
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} else if (VWidth < InVWidth) {
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assert(0 && "Unimp");
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// If there are more elements in the source than there are in the result,
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@ -1639,8 +1642,8 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, uint64_t DemandedElts,
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// elements are undef.
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UndefElts = ~0ULL >> (64-VWidth); // Start out all undef.
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for (unsigned InIdx = 0; InIdx != InVWidth; ++InIdx)
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if ((UndefElts2 & (1ULL << InIdx)) == 0) // Not undef?
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UndefElts &= ~(1ULL << (InIdx/Ratio)); // Clear undef bit.
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if (!UndefElts2[InIdx]) // Not undef?
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UndefElts.clear(InIdx/Ratio); // Clear undef bit.
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}
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break;
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}
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@ -9493,8 +9496,11 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
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case Intrinsic::x86_sse_cvttss2si: {
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// These intrinsics only demands the 0th element of its input vector. If
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// we can simplify the input based on that, do so now.
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uint64_t UndefElts;
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if (Value *V = SimplifyDemandedVectorElts(II->getOperand(1), 1,
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unsigned VWidth =
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cast<VectorType>(II->getOperand(1)->getType())->getNumElements();
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APInt DemandedElts(VWidth, 1);
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APInt UndefElts(VWidth, 0);
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if (Value *V = SimplifyDemandedVectorElts(II->getOperand(1), DemandedElts,
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UndefElts)) {
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II->setOperand(1, V);
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return II;
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@ -11868,10 +11874,10 @@ Instruction *InstCombiner::visitExtractElementInst(ExtractElementInst &EI) {
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// If the input vector has a single use, simplify it based on this use
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// property.
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if (EI.getOperand(0)->hasOneUse() && VectorWidth != 1) {
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uint64_t UndefElts;
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APInt UndefElts(VectorWidth, 0);
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APInt DemandedMask(VectorWidth, 1 << IndexVal);
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if (Value *V = SimplifyDemandedVectorElts(EI.getOperand(0),
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1 << IndexVal,
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UndefElts)) {
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DemandedMask, UndefElts)) {
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EI.setOperand(0, V);
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return &EI;
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}
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@ -12170,15 +12176,14 @@ Instruction *InstCombiner::visitShuffleVectorInst(ShuffleVectorInst &SVI) {
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if (isa<UndefValue>(SVI.getOperand(2)))
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return ReplaceInstUsesWith(SVI, UndefValue::get(SVI.getType()));
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uint64_t UndefElts;
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unsigned VWidth = cast<VectorType>(SVI.getType())->getNumElements();
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if (VWidth != cast<VectorType>(LHS->getType())->getNumElements())
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return 0;
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uint64_t AllOnesEltMask = ~0ULL >> (64-VWidth);
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if (VWidth <= 64 &&
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SimplifyDemandedVectorElts(&SVI, AllOnesEltMask, UndefElts)) {
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APInt UndefElts(VWidth, 0);
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APInt AllOnesEltMask(APInt::getAllOnesValue(VWidth));
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if (SimplifyDemandedVectorElts(&SVI, AllOnesEltMask, UndefElts)) {
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LHS = SVI.getOperand(0);
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RHS = SVI.getOperand(1);
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MadeChange = true;
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19
test/Transforms/InstCombine/vec_demanded_elts-2.ll
Normal file
19
test/Transforms/InstCombine/vec_demanded_elts-2.ll
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@ -0,0 +1,19 @@
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; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep extractelement
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define void @get_image() nounwind {
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entry:
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%0 = call i32 @fgetc(i8* null) nounwind ; <i32> [#uses=1]
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%1 = trunc i32 %0 to i8 ; <i8> [#uses=1]
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%tmp2 = insertelement <100 x i8> zeroinitializer, i8 %1, i32 1 ; <<100 x i8>> [#uses=1]
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%tmp1 = extractelement <100 x i8> %tmp2, i32 0 ; <i8> [#uses=1]
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%2 = icmp eq i8 %tmp1, 80 ; <i1> [#uses=1]
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br i1 %2, label %bb2, label %bb3
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bb2: ; preds = %entry
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br label %bb3
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bb3: ; preds = %bb2, %entry
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unreachable
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}
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declare i32 @fgetc(i8*)
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