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Eliminate CMPri, which is a synonym for SUBCCri

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24805 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-12-17 23:52:08 +00:00
parent 181b7a382f
commit 38abcb500f
4 changed files with 6 additions and 16 deletions
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9
lib/Target/Sparc/SparcInstrInfo.td
View File

@ -94,13 +94,6 @@ let isReturn = 1, isTerminator = 1, hasDelaySlot = 1 in {
def RETL: F3_2<2, 0b111000, (ops),
"retl", [(ret)]>;
}
// CMP is a special case of SUBCC where destination is ignored, by setting it to
// %g0 (hardwired zero).
// FIXME: should keep track of the fact that it defs the integer condition codes
let rd = 0 in
def CMPri: F3_2<2, 0b010100,
(ops IntRegs:$b, i32imm:$c),
"cmp $b, $c", []>;
// Section B.1 - Load Integer Instructions, p. 90
def LDSBrr : F3_1<3, 0b001001,
@ -520,6 +513,8 @@ def FABSS : F3_3<2, 0b110100, 0b000001001,
(ops FPRegs:$dst, FPRegs:$src),
"fabss $src, $dst",
[(set FPRegs:$dst, (fabs FPRegs:$src))]>;
// FIXME: ADD FNEGD/FABSD pseudo instructions.
// Floating-point Square Root Instructions, p.145
def FSQRTS : F3_3<2, 0b110100, 0b000101001,

2
lib/Target/Sparc/SparcV8ISelSimple.cpp
View File

@ -1062,7 +1062,7 @@ void V8ISel::visitBranchInst(BranchInst &I) {
// CondReg=(<condition>);
// If (CondReg==0) goto notTakenSuccMBB;
unsigned CondReg = getReg (I.getCondition ());
BuildMI (BB, V8::CMPri, 2).addSImm (0).addReg (CondReg);
BuildMI (BB, V8::SUBCCri, 2, V8::G0).addReg(CondReg).addSImm(0);
BuildMI (BB, V8::BE, 1).addMBB (notTakenSuccMBB);
BuildMI (BB, V8::BA, 1).addMBB (takenSuccMBB);
return;

2
lib/Target/SparcV8/SparcV8ISelSimple.cpp
View File

@ -1062,7 +1062,7 @@ void V8ISel::visitBranchInst(BranchInst &I) {
// CondReg=(<condition>);
// If (CondReg==0) goto notTakenSuccMBB;
unsigned CondReg = getReg (I.getCondition ());
BuildMI (BB, V8::CMPri, 2).addSImm (0).addReg (CondReg);
BuildMI (BB, V8::SUBCCri, 2, V8::G0).addReg(CondReg).addSImm(0);
BuildMI (BB, V8::BE, 1).addMBB (notTakenSuccMBB);
BuildMI (BB, V8::BA, 1).addMBB (takenSuccMBB);
return;

9
lib/Target/SparcV8/SparcV8InstrInfo.td
View File

@ -94,13 +94,6 @@ let isReturn = 1, isTerminator = 1, hasDelaySlot = 1 in {
def RETL: F3_2<2, 0b111000, (ops),
"retl", [(ret)]>;
}
// CMP is a special case of SUBCC where destination is ignored, by setting it to
// %g0 (hardwired zero).
// FIXME: should keep track of the fact that it defs the integer condition codes
let rd = 0 in
def CMPri: F3_2<2, 0b010100,
(ops IntRegs:$b, i32imm:$c),
"cmp $b, $c", []>;
// Section B.1 - Load Integer Instructions, p. 90
def LDSBrr : F3_1<3, 0b001001,
@ -520,6 +513,8 @@ def FABSS : F3_3<2, 0b110100, 0b000001001,
(ops FPRegs:$dst, FPRegs:$src),
"fabss $src, $dst",
[(set FPRegs:$dst, (fabs FPRegs:$src))]>;
// FIXME: ADD FNEGD/FABSD pseudo instructions.
// Floating-point Square Root Instructions, p.145
def FSQRTS : F3_3<2, 0b110100, 0b000101001,