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[AArch64] Refactor out codes that depend on specific CS save sequence.
No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236143 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -250,6 +250,31 @@ void AArch64FrameLowering::emitCalleeSavedFrameMoves(
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}
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}
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/// Get FPOffset by analyzing the first instruction.
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static int getFPOffsetInPrologue(MachineInstr *MBBI) {
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// First instruction must a) allocate the stack and b) have an immediate
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// that is a multiple of -2.
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assert(((MBBI->getOpcode() == AArch64::STPXpre ||
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MBBI->getOpcode() == AArch64::STPDpre) &&
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MBBI->getOperand(3).getReg() == AArch64::SP &&
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MBBI->getOperand(4).getImm() < 0 &&
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(MBBI->getOperand(4).getImm() & 1) == 0));
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// Frame pointer is fp = sp - 16. Since the STPXpre subtracts the space
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// required for the callee saved register area we get the frame pointer
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// by addding that offset - 16 = -getImm()*8 - 2*8 = -(getImm() + 2) * 8.
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int FPOffset = -(MBBI->getOperand(4).getImm() + 2) * 8;
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assert(FPOffset >= 0 && "Bad Framepointer Offset");
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return FPOffset;
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}
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static bool isCSSave(MachineInstr *MBBI) {
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return MBBI->getOpcode() == AArch64::STPXi ||
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MBBI->getOpcode() == AArch64::STPDi ||
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MBBI->getOpcode() == AArch64::STPXpre ||
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MBBI->getOpcode() == AArch64::STPDpre;
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}
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void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const {
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void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const {
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MachineBasicBlock &MBB = MF.front(); // Prologue goes in entry BB.
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MachineBasicBlock &MBB = MF.front(); // Prologue goes in entry BB.
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MachineBasicBlock::iterator MBBI = MBB.begin();
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MachineBasicBlock::iterator MBBI = MBB.begin();
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@ -300,27 +325,11 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const {
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// Only set up FP if we actually need to.
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// Only set up FP if we actually need to.
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int FPOffset = 0;
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int FPOffset = 0;
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if (HasFP) {
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if (HasFP)
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// First instruction must a) allocate the stack and b) have an immediate
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FPOffset = getFPOffsetInPrologue(MBBI);
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// that is a multiple of -2.
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assert((MBBI->getOpcode() == AArch64::STPXpre ||
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MBBI->getOpcode() == AArch64::STPDpre) &&
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MBBI->getOperand(3).getReg() == AArch64::SP &&
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MBBI->getOperand(4).getImm() < 0 &&
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(MBBI->getOperand(4).getImm() & 1) == 0);
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// Frame pointer is fp = sp - 16. Since the STPXpre subtracts the space
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// required for the callee saved register area we get the frame pointer
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// by addding that offset - 16 = -getImm()*8 - 2*8 = -(getImm() + 2) * 8.
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FPOffset = -(MBBI->getOperand(4).getImm() + 2) * 8;
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assert(FPOffset >= 0 && "Bad Framepointer Offset");
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}
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// Move past the saves of the callee-saved registers.
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// Move past the saves of the callee-saved registers.
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while (MBBI->getOpcode() == AArch64::STPXi ||
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while (isCSSave(MBBI)) {
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MBBI->getOpcode() == AArch64::STPDi ||
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MBBI->getOpcode() == AArch64::STPXpre ||
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MBBI->getOpcode() == AArch64::STPDpre) {
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++MBBI;
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++MBBI;
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NumBytes -= 16;
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NumBytes -= 16;
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}
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}
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