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Thumb assembly parsing and encoding for ADD(register) instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137759 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2757,6 +2757,15 @@ bool ARMAsmParser::shouldOmitCCOutOperand(StringRef Mnemonic,
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static_cast<ARMOperand*>(Operands[4])->isImm0_65535Expr() &&
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static_cast<ARMOperand*>(Operands[1])->getReg() == 0)
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return true;
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// Register-register 'add' for thumb does not have a cc_out operand
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// when there are only two register operands.
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if (isThumb() && Mnemonic == "add" && Operands.size() == 5 &&
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static_cast<ARMOperand*>(Operands[3])->isReg() &&
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static_cast<ARMOperand*>(Operands[4])->isReg() &&
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static_cast<ARMOperand*>(Operands[1])->getReg() == 0)
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return true;
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return false;
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}
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21
test/MC/ARM/basic-thumb-instructions.s
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21
test/MC/ARM/basic-thumb-instructions.s
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@ -0,0 +1,21 @@
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@ RUN: llvm-mc -triple=thumbv6-apple-darwin -show-encoding < %s | FileCheck %s
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.syntax unified
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.globl _func
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@ Check that the assembler can handle the documented syntax from the ARM ARM.
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@ For complex constructs like shifter operands, check more thoroughly for them
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@ once then spot check that following instructions accept the form generally.
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@ This gives us good coverage while keeping the overall size of the test
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@ more reasonable.
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_func:
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@ CHECK: _func
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@------------------------------------------------------------------------------
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@ ADD (register)
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@------------------------------------------------------------------------------
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adds r1, r2, r3
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add r2, r8
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@ CHECK: adds r1, r2, r3 @ encoding: [0xd1,0x18]
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@ CHECK: add r2, r8 @ encoding: [0x42,0x44]
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