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Make use of new reserved/required scheduling stuff: introduce VFP and NEON locks to model domain cross stalls precisly.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100646 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov
2010-04-07 18:19:40 +00:00
parent 96085a36db
commit 391b3431e2
3 changed files with 87 additions and 27 deletions
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lib/Target/ARM/ARMSchedule.td
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@@ -17,6 +17,8 @@ def FU_LdSt0 : FuncUnit; // pipeline 0 load/store
def FU_LdSt1 : FuncUnit; // pipeline 1 load/store
def FU_NPipe : FuncUnit; // NEON ALU/MUL pipe
def FU_NLSPipe : FuncUnit; // NEON LS pipe
def FU_DRegsVFP: FuncUnit; // FP register set, VFP side
def FU_DRegsN : FuncUnit; // FP register set, NEON side
//===----------------------------------------------------------------------===//
// Instruction Itinerary classes used for ARM