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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-01 15:11:24 +00:00
Cosmetic changes, no functionality changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84773 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -250,22 +250,22 @@ void MSP430AsmPrinter::printCCOperand(const MachineInstr *MI, int OpNum) {
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default:
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llvm_unreachable("Unsupported CC code");
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break;
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case MSP430::COND_E:
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case MSP430CC::COND_E:
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O << "eq";
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break;
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case MSP430::COND_NE:
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case MSP430CC::COND_NE:
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O << "ne";
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break;
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case MSP430::COND_HS:
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case MSP430CC::COND_HS:
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O << "hs";
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break;
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case MSP430::COND_LO:
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case MSP430CC::COND_LO:
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O << "lo";
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break;
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case MSP430::COND_GE:
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case MSP430CC::COND_GE:
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O << "ge";
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break;
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case MSP430::COND_L:
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case MSP430CC::COND_L:
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O << 'l';
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break;
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}
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@ -12,6 +12,7 @@
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "asm-printer"
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#include "MSP430.h"
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#include "MSP430InstrInfo.h"
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#include "MSP430InstPrinter.h"
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#include "llvm/MC/MCInst.h"
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@ -19,7 +20,6 @@
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#include "llvm/MC/MCExpr.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/FormattedStream.h"
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#include "MSP430GenInstrNames.inc"
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using namespace llvm;
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@ -94,22 +94,22 @@ void MSP430InstPrinter::printCCOperand(const MCInst *MI, unsigned OpNo) {
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default:
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llvm_unreachable("Unsupported CC code");
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break;
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case MSP430::COND_E:
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case MSP430CC::COND_E:
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O << "eq";
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break;
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case MSP430::COND_NE:
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case MSP430CC::COND_NE:
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O << "ne";
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break;
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case MSP430::COND_HS:
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case MSP430CC::COND_HS:
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O << "hs";
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break;
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case MSP430::COND_LO:
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case MSP430CC::COND_LO:
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O << "lo";
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break;
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case MSP430::COND_GE:
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case MSP430CC::COND_GE:
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O << "ge";
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break;
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case MSP430::COND_L:
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case MSP430CC::COND_L:
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O << 'l';
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break;
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}
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@ -17,6 +17,20 @@
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#include "llvm/Target/TargetMachine.h"
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namespace MSP430CC {
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// MSP430 specific condition code.
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enum CondCodes {
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COND_E = 0, // aka COND_Z
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COND_NE = 1, // aka COND_NZ
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COND_HS = 2, // aka COND_C
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COND_LO = 3, // aka COND_NC
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COND_GE = 4,
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COND_L = 5,
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COND_INVALID = -1
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};
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}
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namespace llvm {
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class MSP430TargetMachine;
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class FunctionPass;
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@ -567,44 +567,45 @@ SDValue MSP430TargetLowering::LowerExternalSymbol(SDValue Op,
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return DAG.getNode(MSP430ISD::Wrapper, dl, getPointerTy(), Result);;
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}
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static SDValue EmitCMP(SDValue &LHS, SDValue &RHS, unsigned &TargetCC,
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static SDValue EmitCMP(SDValue &LHS, SDValue &RHS, SDValue &TargetCC,
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ISD::CondCode CC,
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DebugLoc dl, SelectionDAG &DAG) {
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// FIXME: Handle bittests someday
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assert(!LHS.getValueType().isFloatingPoint() && "We don't handle FP yet");
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// FIXME: Handle jump negative someday
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TargetCC = MSP430::COND_INVALID;
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MSP430CC::CondCodes TCC = MSP430CC::COND_INVALID;
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switch (CC) {
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default: llvm_unreachable("Invalid integer condition!");
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case ISD::SETEQ:
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TargetCC = MSP430::COND_E; // aka COND_Z
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TCC = MSP430CC::COND_E; // aka COND_Z
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break;
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case ISD::SETNE:
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TargetCC = MSP430::COND_NE; // aka COND_NZ
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TCC = MSP430CC::COND_NE; // aka COND_NZ
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break;
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case ISD::SETULE:
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std::swap(LHS, RHS); // FALLTHROUGH
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case ISD::SETUGE:
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TargetCC = MSP430::COND_HS; // aka COND_C
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TCC = MSP430CC::COND_HS; // aka COND_C
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break;
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case ISD::SETUGT:
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std::swap(LHS, RHS); // FALLTHROUGH
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case ISD::SETULT:
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TargetCC = MSP430::COND_LO; // aka COND_NC
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TCC = MSP430CC::COND_LO; // aka COND_NC
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break;
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case ISD::SETLE:
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std::swap(LHS, RHS); // FALLTHROUGH
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case ISD::SETGE:
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TargetCC = MSP430::COND_GE;
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TCC = MSP430CC::COND_GE;
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break;
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case ISD::SETGT:
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std::swap(LHS, RHS); // FALLTHROUGH
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case ISD::SETLT:
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TargetCC = MSP430::COND_L;
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TCC = MSP430CC::COND_L;
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break;
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}
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TargetCC = DAG.getConstant(TCC, MVT::i8);
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return DAG.getNode(MSP430ISD::CMP, dl, MVT::Flag, LHS, RHS);
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}
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@ -617,13 +618,11 @@ SDValue MSP430TargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) {
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SDValue Dest = Op.getOperand(4);
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DebugLoc dl = Op.getDebugLoc();
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unsigned TargetCC = MSP430::COND_INVALID;
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SDValue TargetCC;
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SDValue Flag = EmitCMP(LHS, RHS, TargetCC, CC, dl, DAG);
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return DAG.getNode(MSP430ISD::BR_CC, dl, Op.getValueType(),
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Chain,
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Dest, DAG.getConstant(TargetCC, MVT::i8),
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Flag);
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Chain, Dest, TargetCC, Flag);
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}
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SDValue MSP430TargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) {
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@ -634,14 +633,14 @@ SDValue MSP430TargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) {
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ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
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DebugLoc dl = Op.getDebugLoc();
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unsigned TargetCC = MSP430::COND_INVALID;
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SDValue TargetCC;
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SDValue Flag = EmitCMP(LHS, RHS, TargetCC, CC, dl, DAG);
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SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::Flag);
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SmallVector<SDValue, 4> Ops;
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Ops.push_back(TrueV);
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Ops.push_back(FalseV);
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Ops.push_back(DAG.getConstant(TargetCC, MVT::i8));
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Ops.push_back(TargetCC);
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Ops.push_back(Flag);
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return DAG.getNode(MSP430ISD::SELECT_CC, dl, VTs, &Ops[0], Ops.size());
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@ -21,20 +21,6 @@ namespace llvm {
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class MSP430TargetMachine;
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namespace MSP430 {
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// MSP430 specific condition code.
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enum CondCode {
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COND_E = 0, // aka COND_Z
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COND_NE = 1, // aka COND_NZ
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COND_HS = 2, // aka COND_C
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COND_LO = 3, // aka COND_NC
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COND_GE = 4,
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COND_L = 5,
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COND_INVALID
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};
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}
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class MSP430InstrInfo : public TargetInstrInfoImpl {
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const MSP430RegisterInfo RI;
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MSP430TargetMachine &TM;
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