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Move the Target way of overriding DAG Scheduler to a target hook
Summary: The previous way of overriding it was relying on calling "setDefault" on the global registry, which implies global mutable state. Reviewers: echristo, atrick Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11538 From: Mehdi Amini <mehdi.amini@apple.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243388 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -52,12 +52,6 @@ public:
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static RegisterScheduler *getList() {
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static RegisterScheduler *getList() {
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return (RegisterScheduler *)Registry.getList();
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return (RegisterScheduler *)Registry.getList();
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}
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}
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static FunctionPassCtor getDefault() {
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return (FunctionPassCtor)Registry.getDefault();
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}
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static void setDefault(FunctionPassCtor C) {
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Registry.setDefault((MachinePassCtor)C);
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}
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static void setListener(MachinePassRegistryListener *L) {
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static void setListener(MachinePassRegistryListener *L) {
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Registry.setListener(L);
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Registry.setListener(L);
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}
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}
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@ -15,6 +15,7 @@
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#define LLVM_TARGET_TARGETSUBTARGETINFO_H
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#define LLVM_TARGET_TARGETSUBTARGETINFO_H
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#include "llvm/CodeGen/PBQPRAConstraint.h"
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#include "llvm/CodeGen/PBQPRAConstraint.h"
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#include "llvm/CodeGen/SchedulerRegistry.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/CodeGen.h"
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#include "llvm/Support/CodeGen.h"
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@ -81,6 +82,11 @@ public:
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virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const {
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virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const {
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return nullptr;
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return nullptr;
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}
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}
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/// Target can subclass this hook to select a different DAG scheduler.
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virtual RegisterScheduler::FunctionPassCtor
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getDAGScheduler(CodeGenOpt::Level) const {
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return nullptr;
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}
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/// getRegisterInfo - If register information is available, return it. If
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/// getRegisterInfo - If register information is available, return it. If
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/// not, return null. This is kept separate from RegInfo until RegInfo has
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/// not, return null. This is kept separate from RegInfo until RegInfo has
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@ -293,6 +293,11 @@ namespace llvm {
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const TargetLowering *TLI = IS->TLI;
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const TargetLowering *TLI = IS->TLI;
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const TargetSubtargetInfo &ST = IS->MF->getSubtarget();
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const TargetSubtargetInfo &ST = IS->MF->getSubtarget();
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// Try first to see if the Target has its own way of selecting a scheduler
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if (auto *SchedulerCtor = ST.getDAGScheduler(OptLevel)) {
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return SchedulerCtor(IS, OptLevel);
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}
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if (OptLevel == CodeGenOpt::None ||
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if (OptLevel == CodeGenOpt::None ||
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(ST.enableMachineScheduler() && ST.enableMachineSchedDefaultSched()) ||
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(ST.enableMachineScheduler() && ST.enableMachineSchedDefaultSched()) ||
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TLI->getSchedulingPreference() == Sched::Source)
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TLI->getSchedulingPreference() == Sched::Source)
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@ -1643,14 +1648,7 @@ SelectionDAGISel::FinishBasicBlock() {
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/// one preferred by the target.
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/// one preferred by the target.
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///
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///
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ScheduleDAGSDNodes *SelectionDAGISel::CreateScheduler() {
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ScheduleDAGSDNodes *SelectionDAGISel::CreateScheduler() {
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RegisterScheduler::FunctionPassCtor Ctor = RegisterScheduler::getDefault();
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return ISHeuristic(this, OptLevel);
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if (!Ctor) {
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Ctor = ISHeuristic;
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RegisterScheduler::setDefault(Ctor);
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}
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return Ctor(this, OptLevel);
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}
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}
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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