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Fix invalid chain folding for memory variant of sdiv / udiv
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92472 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -643,16 +643,16 @@ SDNode *SystemZDAGToDAGISel::Select(SDValue Op) {
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EVT ResVT;
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EVT ResVT;
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bool is32Bit = false;
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bool is32Bit = false;
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switch (NVT.getSimpleVT().SimpleTy) {
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switch (NVT.getSimpleVT().SimpleTy) {
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default: assert(0 && "Unsupported VT!");
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default: assert(0 && "Unsupported VT!");
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case MVT::i32:
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case MVT::i32:
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Opc = SystemZ::SDIVREM32r; MOpc = SystemZ::SDIVREM32m;
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Opc = SystemZ::SDIVREM32r; MOpc = SystemZ::SDIVREM32m;
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ResVT = MVT::v2i64;
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ResVT = MVT::v2i64;
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is32Bit = true;
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is32Bit = true;
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break;
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break;
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case MVT::i64:
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case MVT::i64:
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Opc = SystemZ::SDIVREM64r; MOpc = SystemZ::SDIVREM64m;
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Opc = SystemZ::SDIVREM64r; MOpc = SystemZ::SDIVREM64m;
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ResVT = MVT::v2i64;
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ResVT = MVT::v2i64;
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break;
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break;
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}
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}
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SDValue Tmp0, Tmp1, Tmp2;
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SDValue Tmp0, Tmp1, Tmp2;
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@ -677,10 +677,10 @@ SDNode *SystemZDAGToDAGISel::Select(SDValue Op) {
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SDValue DivVal = SDValue(Dividend, 0);
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SDValue DivVal = SDValue(Dividend, 0);
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if (foldedLoad) {
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if (foldedLoad) {
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SDValue Ops[] = { DivVal, Tmp0, Tmp1, Tmp2, N1.getOperand(0) };
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SDValue Ops[] = { DivVal, Tmp0, Tmp1, Tmp2, N1.getOperand(0) };
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Result = CurDAG->getMachineNode(MOpc, dl, ResVT,
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Result = CurDAG->getMachineNode(MOpc, dl, ResVT, MVT::Other,
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Ops, array_lengthof(Ops));
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Ops, array_lengthof(Ops));
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// Update the chain.
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// Update the chain.
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ReplaceUses(N1.getValue(1), SDValue(Result, 0));
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ReplaceUses(N1.getValue(1), SDValue(Result, 1));
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} else {
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} else {
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Result = CurDAG->getMachineNode(Opc, dl, ResVT, SDValue(Dividend, 0), N1);
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Result = CurDAG->getMachineNode(Opc, dl, ResVT, SDValue(Dividend, 0), N1);
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}
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}
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@ -729,18 +729,18 @@ SDNode *SystemZDAGToDAGISel::Select(SDValue Op) {
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bool is32Bit = false;
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bool is32Bit = false;
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switch (NVT.getSimpleVT().SimpleTy) {
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switch (NVT.getSimpleVT().SimpleTy) {
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default: assert(0 && "Unsupported VT!");
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default: assert(0 && "Unsupported VT!");
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case MVT::i32:
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case MVT::i32:
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Opc = SystemZ::UDIVREM32r; MOpc = SystemZ::UDIVREM32m;
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Opc = SystemZ::UDIVREM32r; MOpc = SystemZ::UDIVREM32m;
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ClrOpc = SystemZ::MOV64Pr0_even;
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ClrOpc = SystemZ::MOV64Pr0_even;
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ResVT = MVT::v2i32;
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ResVT = MVT::v2i32;
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is32Bit = true;
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is32Bit = true;
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break;
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break;
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case MVT::i64:
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case MVT::i64:
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Opc = SystemZ::UDIVREM64r; MOpc = SystemZ::UDIVREM64m;
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Opc = SystemZ::UDIVREM64r; MOpc = SystemZ::UDIVREM64m;
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ClrOpc = SystemZ::MOV128r0_even;
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ClrOpc = SystemZ::MOV128r0_even;
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ResVT = MVT::v2i64;
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ResVT = MVT::v2i64;
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break;
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break;
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}
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}
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SDValue Tmp0, Tmp1, Tmp2;
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SDValue Tmp0, Tmp1, Tmp2;
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@ -767,10 +767,10 @@ SDNode *SystemZDAGToDAGISel::Select(SDValue Op) {
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SDNode *Result;
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SDNode *Result;
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if (foldedLoad) {
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if (foldedLoad) {
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SDValue Ops[] = { DivVal, Tmp0, Tmp1, Tmp2, N1.getOperand(0) };
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SDValue Ops[] = { DivVal, Tmp0, Tmp1, Tmp2, N1.getOperand(0) };
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Result = CurDAG->getMachineNode(MOpc, dl,ResVT,
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Result = CurDAG->getMachineNode(MOpc, dl, ResVT, MVT::Other,
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Ops, array_lengthof(Ops));
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Ops, array_lengthof(Ops));
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// Update the chain.
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// Update the chain.
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ReplaceUses(N1.getValue(1), SDValue(Result, 0));
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ReplaceUses(N1.getValue(1), SDValue(Result, 1));
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} else {
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} else {
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Result = CurDAG->getMachineNode(Opc, dl, ResVT, DivVal, N1);
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Result = CurDAG->getMachineNode(Opc, dl, ResVT, DivVal, N1);
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}
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}
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50
test/CodeGen/SystemZ/2010-01-04-DivMem.ll
Normal file
50
test/CodeGen/SystemZ/2010-01-04-DivMem.ll
Normal file
@ -0,0 +1,50 @@
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; RUN: llc < %s
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target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64"
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target triple = "s390x-elf"
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@REGISTER = external global [10 x i32] ; <[10 x i32]*> [#uses=2]
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define void @DIVR_P(i32 signext %PRINT_EFFECT) nounwind {
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entry:
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%REG1 = alloca i32, align 4 ; <i32*> [#uses=2]
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%REG2 = alloca i32, align 4 ; <i32*> [#uses=2]
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%call = call signext i32 (...)* @FORMAT2(i32* %REG1, i32* %REG2) nounwind ; <i32> [#uses=0]
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%tmp = load i32* %REG1 ; <i32> [#uses=1]
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%idxprom = sext i32 %tmp to i64 ; <i64> [#uses=1]
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%arrayidx = getelementptr inbounds [10 x i32]* @REGISTER, i64 0, i64 %idxprom ; <i32*> [#uses=2]
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%tmp1 = load i32* %arrayidx ; <i32> [#uses=2]
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%tmp2 = load i32* %REG2 ; <i32> [#uses=1]
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%idxprom3 = sext i32 %tmp2 to i64 ; <i64> [#uses=1]
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%arrayidx4 = getelementptr inbounds [10 x i32]* @REGISTER, i64 0, i64 %idxprom3 ; <i32*> [#uses=3]
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%tmp5 = load i32* %arrayidx4 ; <i32> [#uses=3]
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%cmp6 = icmp sgt i32 %tmp5, 8388607 ; <i1> [#uses=1]
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%REG2_SIGN.0 = select i1 %cmp6, i32 -1, i32 1 ; <i32> [#uses=2]
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%cmp10 = icmp eq i32 %REG2_SIGN.0, 1 ; <i1> [#uses=1]
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%not.cmp = icmp slt i32 %tmp1, 8388608 ; <i1> [#uses=2]
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%or.cond = and i1 %cmp10, %not.cmp ; <i1> [#uses=1]
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br i1 %or.cond, label %if.then13, label %if.end25
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if.then13: ; preds = %entry
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%div = sdiv i32 %tmp5, %tmp1 ; <i32> [#uses=2]
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store i32 %div, i32* %arrayidx4
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br label %if.end25
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if.end25: ; preds = %if.then13, %entry
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%tmp35 = phi i32 [ %div, %if.then13 ], [ %tmp5, %entry ] ; <i32> [#uses=1]
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%cmp27 = icmp eq i32 %REG2_SIGN.0, -1 ; <i1> [#uses=1]
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%or.cond46 = and i1 %cmp27, %not.cmp ; <i1> [#uses=1]
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br i1 %or.cond46, label %if.then31, label %if.end45
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if.then31: ; preds = %if.end25
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%sub = sub i32 16777216, %tmp35 ; <i32> [#uses=1]
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%tmp39 = load i32* %arrayidx ; <i32> [#uses=1]
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%div40 = udiv i32 %sub, %tmp39 ; <i32> [#uses=1]
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%sub41 = sub i32 16777216, %div40 ; <i32> [#uses=1]
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store i32 %sub41, i32* %arrayidx4
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ret void
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if.end45: ; preds = %if.end25
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ret void
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}
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declare signext i32 @FORMAT2(...)
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