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https://github.com/c64scene-ar/llvm-6502.git
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Replace the uint64_t -> double convertion algorithm with one that's more efficient.
This small bit of ASM code is sufficient to do what the old algorithm did:
movq %rax, %xmm0
punpckldq (c0), %xmm0 // c0: (uint4){ 0x43300000U, 0x45300000U, 0U, 0U }
subpd (c1), %xmm0 // c1: (double2){ 0x1.0p52, 0x1.0p52 * 0x1.0p32 }
#ifdef __SSE3__
haddpd %xmm0, %xmm0
#else
pshufd $0x4e, %xmm0, %xmm1
addpd %xmm1, %xmm0
#endif
It's arguably faster. One caveat, the 'haddpd' instruction isn't very fast on
all processors.
<rdar://problem/7719814>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147593 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling
parent
1130d220a3
commit
397ae210ce
@ -256,7 +256,7 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
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if (Subtarget->is64Bit()) {
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setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Promote);
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setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Expand);
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setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom);
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} else if (!TM.Options.UseSoftFloat) {
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// We have an algorithm for SSE2->double, and we turn this into a
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// 64-bit FILD followed by conditional FADD for other targets.
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@ -7581,38 +7581,17 @@ SDValue X86TargetLowering::BuildFILD(SDValue Op, EVT SrcVT, SDValue Chain,
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// LowerUINT_TO_FP_i64 - 64-bit unsigned integer to double expansion.
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SDValue X86TargetLowering::LowerUINT_TO_FP_i64(SDValue Op,
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SelectionDAG &DAG) const {
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// This algorithm is not obvious. Here it is in C code, more or less:
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// This algorithm is not obvious. Here it is what we're trying to output:
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/*
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double uint64_to_double( uint32_t hi, uint32_t lo ) {
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static const __m128i exp = { 0x4330000045300000ULL, 0 };
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static const __m128d bias = { 0x1.0p84, 0x1.0p52 };
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// Copy ints to xmm registers.
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__m128i xh = _mm_cvtsi32_si128( hi );
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__m128i xl = _mm_cvtsi32_si128( lo );
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// Combine into low half of a single xmm register.
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__m128i x = _mm_unpacklo_epi32( xh, xl );
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__m128d d;
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double sd;
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// Merge in appropriate exponents to give the integer bits the right
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// magnitude.
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x = _mm_unpacklo_epi32( x, exp );
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// Subtract away the biases to deal with the IEEE-754 double precision
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// implicit 1.
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d = _mm_sub_pd( (__m128d) x, bias );
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// All conversions up to here are exact. The correctly rounded result is
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// calculated using the current rounding mode using the following
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// horizontal add.
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d = _mm_add_sd( d, _mm_unpackhi_pd( d, d ) );
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_mm_store_sd( &sd, d ); // Because we are returning doubles in XMM, this
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// store doesn't really need to be here (except
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// maybe to zero the other double)
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return sd;
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}
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movq %rax, %xmm0
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punpckldq (c0), %xmm0 // c0: (uint4){ 0x43300000U, 0x45300000U, 0U, 0U }
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subpd (c1), %xmm0 // c1: (double2){ 0x1.0p52, 0x1.0p52 * 0x1.0p32 }
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#ifdef __SSE3__
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haddpd %xmm0, %xmm0
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#else
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pshufd $0x4e, %xmm0, %xmm1
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addpd %xmm1, %xmm0
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#endif
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*/
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DebugLoc dl = Op.getDebugLoc();
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@ -7620,46 +7599,51 @@ SDValue X86TargetLowering::LowerUINT_TO_FP_i64(SDValue Op,
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// Build some magic constants.
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SmallVector<Constant*,4> CV0;
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CV0.push_back(ConstantInt::get(*Context, APInt(32, 0x45300000)));
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CV0.push_back(ConstantInt::get(*Context, APInt(32, 0x43300000)));
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CV0.push_back(ConstantInt::get(*Context, APInt(32, 0x45300000)));
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CV0.push_back(ConstantInt::get(*Context, APInt(32, 0)));
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CV0.push_back(ConstantInt::get(*Context, APInt(32, 0)));
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Constant *C0 = ConstantVector::get(CV0);
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SDValue CPIdx0 = DAG.getConstantPool(C0, getPointerTy(), 16);
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SmallVector<Constant*,2> CV1;
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CV1.push_back(
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ConstantFP::get(*Context, APFloat(APInt(64, 0x4530000000000000ULL))));
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CV1.push_back(
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ConstantFP::get(*Context, APFloat(APInt(64, 0x4330000000000000ULL))));
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CV1.push_back(
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ConstantFP::get(*Context, APFloat(APInt(64, 0x4530000000000000ULL))));
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Constant *C1 = ConstantVector::get(CV1);
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SDValue CPIdx1 = DAG.getConstantPool(C1, getPointerTy(), 16);
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SDValue XR1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4i32,
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DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
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Op.getOperand(0),
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DAG.getIntPtrConstant(1)));
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SDValue XR2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4i32,
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DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32,
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Op.getOperand(0),
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DAG.getIntPtrConstant(0)));
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SDValue Unpck1 = getUnpackl(DAG, dl, MVT::v4i32, XR1, XR2);
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// Load the 64-bit value into an XMM register.
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SDValue XR1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64,
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Op.getOperand(0));
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SDValue CLod0 = DAG.getLoad(MVT::v4i32, dl, DAG.getEntryNode(), CPIdx0,
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MachinePointerInfo::getConstantPool(),
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false, false, false, 16);
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SDValue Unpck2 = getUnpackl(DAG, dl, MVT::v4i32, Unpck1, CLod0);
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SDValue XR2F = DAG.getNode(ISD::BITCAST, dl, MVT::v2f64, Unpck2);
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SDValue Unpck1 = getUnpackl(DAG, dl, MVT::v4i32,
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DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, XR1),
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CLod0);
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SDValue CLod1 = DAG.getLoad(MVT::v2f64, dl, CLod0.getValue(1), CPIdx1,
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MachinePointerInfo::getConstantPool(),
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false, false, false, 16);
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SDValue XR2F = DAG.getNode(ISD::BITCAST, dl, MVT::v2f64, Unpck1);
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SDValue Sub = DAG.getNode(ISD::FSUB, dl, MVT::v2f64, XR2F, CLod1);
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SDValue Result;
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// Add the halves; easiest way is to swap them into another reg first.
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int ShufMask[2] = { 1, -1 };
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SDValue Shuf = DAG.getVectorShuffle(MVT::v2f64, dl, Sub,
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DAG.getUNDEF(MVT::v2f64), ShufMask);
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SDValue Add = DAG.getNode(ISD::FADD, dl, MVT::v2f64, Shuf, Sub);
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return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Add,
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if (Subtarget->hasSSE3()) {
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// FIXME: The 'haddpd' instruction may be slower than 'movhlps + addsd'.
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Result = DAG.getNode(X86ISD::FHADD, dl, MVT::v2f64, Sub, Sub);
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} else {
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SDValue S2F = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, Sub);
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SDValue Shuffle = getTargetShuffleNode(X86ISD::PSHUFD, dl, MVT::v4i32,
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S2F, 0x4E, DAG);
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Result = DAG.getNode(ISD::FADD, dl, MVT::v2f64,
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DAG.getNode(ISD::BITCAST, dl, MVT::v2f64, Shuffle),
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Sub);
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}
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return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Result,
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DAG.getIntPtrConstant(0));
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}
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@ -7729,6 +7713,8 @@ SDValue X86TargetLowering::LowerUINT_TO_FP(SDValue Op,
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return LowerUINT_TO_FP_i64(Op, DAG);
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else if (SrcVT == MVT::i32 && X86ScalarSSEf64)
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return LowerUINT_TO_FP_i32(Op, DAG);
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else if (SrcVT == MVT::i64 && DstVT == MVT::f32)
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return SDValue();
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// Make a 64-bit buffer, and use it to build an FILD.
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SDValue StackSlot = DAG.CreateStackTemporary(MVT::i64);
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