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Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().
The getPointerRegClass() hook can return register classes that depend on the calling convention of the current function (ptr_rc_tailcall). So far, we have been able to infer the calling convention from the subtarget alone, but as we add support for multiple calling conventions per target, that no longer works. Patch by Yiannis Tsiouris! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156328 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -942,9 +942,13 @@ const TargetRegisterClass*
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MachineInstr::getRegClassConstraint(unsigned OpIdx,
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const TargetInstrInfo *TII,
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const TargetRegisterInfo *TRI) const {
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assert(getParent() && "Can't have an MBB reference here!");
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assert(getParent()->getParent() && "Can't have an MF reference here!");
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const MachineFunction &MF = *getParent()->getParent();
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// Most opcodes have fixed constraints in their MCInstrDesc.
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if (!isInlineAsm())
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return TII->getRegClass(getDesc(), OpIdx, TRI);
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return TII->getRegClass(getDesc(), OpIdx, TRI, MF);
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if (!getOperand(OpIdx).isReg())
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return NULL;
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@@ -966,7 +970,7 @@ MachineInstr::getRegClassConstraint(unsigned OpIdx,
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// Assume that all registers in a memory operand are pointers.
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if (InlineAsm::getKind(Flag) == InlineAsm::Kind_Mem)
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return TRI->getPointerRegClass();
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return TRI->getPointerRegClass(MF);
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return NULL;
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}
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