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Fix shl folding in DAG combiner.

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Summary: The code responsible for shl folding in the DAGCombiner was assuming incorrectly that all constants are less than 64 bits. This patch simply changes the way values are compared.

Test Plan: A regression test included.

Reviewers: andreadb

Reviewed By: andreadb

Subscribers: andreadb, test, llvm-commits

Differential Revision: http://reviews.llvm.org/D10602

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240291 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Pawel Bylica 2015-06-22 15:58:11 +00:00
parent 0ed63077a2
commit 39befc6ca8
2 changed files with 9 additions and 1 deletions
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2
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -4275,7 +4275,7 @@ SDValue DAGCombiner::visitSHL(SDNode *N) {
if (isNullConstant(N0))
return N0;
// fold (shl x, c >= size(x)) -> undef
if (N1C && N1C->getZExtValue() >= OpSizeInBits)
if (N1C && N1C->getAPIntValue().uge(OpSizeInBits))
return DAG.getUNDEF(VT);
// fold (shl x, 0) -> x
if (N1C && N1C->isNullValue())

8
test/CodeGen/X86/fold-vector-shl-crash.ll Normal file
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@ -0,0 +1,8 @@
; RUN: llc < %s | FileCheck %s
;CHECK-LABEL: test
define <2 x i256> @test() {
%S = shufflevector <2 x i256> zeroinitializer, <2 x i256> <i256 -1, i256 -1>, <2 x i32> <i32 0, i32 2>
%B = shl <2 x i256> %S, <i256 -1, i256 -1> ; DAG Combiner crashes here
ret <2 x i256> %B
}