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Fix up a few minor typos in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71563 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -996,7 +996,7 @@ void ARMConstantIslands::CreateNewWater(unsigned CPUserIndex,
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}
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}
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/// HandleConstantPoolUser - Analyze the specified user, checking to see if it
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/// HandleConstantPoolUser - Analyze the specified user, checking to see if it
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/// is out-of-range. If so, pick it up the constant pool value and move it some
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/// is out-of-range. If so, pick up the constant pool value and move it some
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/// place in-range. Return true if we changed any addresses (thus must run
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/// place in-range. Return true if we changed any addresses (thus must run
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/// another pass of branch lengthening), false otherwise.
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/// another pass of branch lengthening), false otherwise.
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bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn,
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bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn,
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@ -1008,7 +1008,7 @@ bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn,
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unsigned Size = CPEMI->getOperand(2).getImm();
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unsigned Size = CPEMI->getOperand(2).getImm();
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MachineBasicBlock *NewMBB;
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MachineBasicBlock *NewMBB;
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// Compute this only once, it's expensive. The 4 or 8 is the value the
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// Compute this only once, it's expensive. The 4 or 8 is the value the
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// hardware keeps in the PC (2 insns ahead of the reference).
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// hardware keeps in the PC (2 insns ahead of the reference).
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unsigned UserOffset = GetOffsetOf(UserMI) + (isThumb ? 4 : 8);
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unsigned UserOffset = GetOffsetOf(UserMI) + (isThumb ? 4 : 8);
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// Special case: tLEApcrel are two instructions MI's. The actual user is the
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// Special case: tLEApcrel are two instructions MI's. The actual user is the
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@ -1024,7 +1024,7 @@ bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn,
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// No existing clone of this CPE is within range.
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// No existing clone of this CPE is within range.
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// We will be generating a new clone. Get a UID for it.
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// We will be generating a new clone. Get a UID for it.
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unsigned ID = AFI->createConstPoolEntryUId();
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unsigned ID = AFI->createConstPoolEntryUId();
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// Look for water where we can place this CPE. We look for the farthest one
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// Look for water where we can place this CPE. We look for the farthest one
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// away that will work. Forward references only for now (although later
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// away that will work. Forward references only for now (although later
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@ -1160,7 +1160,7 @@ bool ARMConstantIslands::FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br) {
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/// FixUpUnconditionalBr - Fix up an unconditional branch whose destination is
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/// FixUpUnconditionalBr - Fix up an unconditional branch whose destination is
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/// too far away to fit in its displacement field. If the LR register has been
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/// too far away to fit in its displacement field. If the LR register has been
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/// spilled in the epilogue, then we can use BL to implement a far jump.
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/// spilled in the epilogue, then we can use BL to implement a far jump.
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/// Otherwise, add an intermediate branch instruction to to a branch.
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/// Otherwise, add an intermediate branch instruction to a branch.
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bool
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bool
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ARMConstantIslands::FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br) {
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ARMConstantIslands::FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br) {
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MachineInstr *MI = Br.MI;
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MachineInstr *MI = Br.MI;
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@ -1188,7 +1188,7 @@ ARMConstantIslands::FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br) {
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MachineInstr *MI = Br.MI;
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MachineInstr *MI = Br.MI;
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MachineBasicBlock *DestBB = MI->getOperand(0).getMBB();
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MachineBasicBlock *DestBB = MI->getOperand(0).getMBB();
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// Add a unconditional branch to the destination and invert the branch
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// Add an unconditional branch to the destination and invert the branch
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// condition to jump over it:
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// condition to jump over it:
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// blt L1
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// blt L1
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// =>
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// =>
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@ -1210,7 +1210,7 @@ ARMConstantIslands::FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br) {
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if (BMI != MI) {
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if (BMI != MI) {
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if (next(MachineBasicBlock::iterator(MI)) == prior(MBB->end()) &&
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if (next(MachineBasicBlock::iterator(MI)) == prior(MBB->end()) &&
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BMI->getOpcode() == Br.UncondBr) {
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BMI->getOpcode() == Br.UncondBr) {
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// Last MI in the BB is a unconditional branch. Can we simply invert the
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// Last MI in the BB is an unconditional branch. Can we simply invert the
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// condition and swap destinations:
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// condition and swap destinations:
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// beq L1
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// beq L1
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// b L2
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// b L2
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@ -1230,7 +1230,7 @@ ARMConstantIslands::FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br) {
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if (NeedSplit) {
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if (NeedSplit) {
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SplitBlockBeforeInstr(MI);
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SplitBlockBeforeInstr(MI);
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// No need for the branch to the next block. We're adding a unconditional
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// No need for the branch to the next block. We're adding an unconditional
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// branch to the destination.
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// branch to the destination.
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int delta = TII->GetInstSizeInBytes(&MBB->back());
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int delta = TII->GetInstSizeInBytes(&MBB->back());
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BBSizes[MBB->getNumber()] -= delta;
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BBSizes[MBB->getNumber()] -= delta;
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