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Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134590 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2011-07-07 03:55:05 +00:00
parent 6a6b8c3e96
commit 39dfb0ff84
24 changed files with 161 additions and 150 deletions
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17
lib/Target/ARM/ARMSubtarget.cpp
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@@ -39,9 +39,16 @@ StrictAlign("arm-strict-align", cl::Hidden,
ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS)
: ARMGenSubtargetInfo()
, ARMArchVersion(V4)
, ARMProcFamily(Others)
, ARMFPUType(None)
, HasV4TOps(false)
, HasV5TOps(false)
, HasV5TEOps(false)
, HasV6Ops(false)
, HasV6T2Ops(false)
, HasV7Ops(false)
, HasVFPv2(false)
, HasVFPv3(false)
, HasNEON(false)
, UseNEONForSinglePrecisionFP(false)
, SlowFPVMLx(false)
, HasVMLxForwarding(false)
@@ -89,8 +96,8 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU,
// Thumb2 implies at least V6T2. FIXME: Fix tests to explicitly specify a
// ARM version or CPU and then remove this.
if (ARMArchVersion < V6T2 && hasThumb2())
ARMArchVersion = V6T2;
if (!HasV6T2Ops && hasThumb2())
HasV4TOps = HasV5TOps = HasV5TEOps = HasV6Ops = HasV6T2Ops = true;
// Initialize scheduling itinerary for the specified CPU.
InstrItins = getInstrItineraryForCPU(CPUString);
@@ -104,7 +111,7 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU,
if (!isTargetDarwin())
UseMovt = hasV6T2Ops();
else {
IsR9Reserved = ReserveR9 | (ARMArchVersion < V6);
IsR9Reserved = ReserveR9 | !HasV6Ops;
UseMovt = DarwinUseMOVT && hasV6T2Ops();
}