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This assertion is too restrictive, it does not apply for dangling dbg value nodes (nodes where dbg.value intrinsic preceds use of the value).

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124202 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Devang Patel 2011-01-25 18:09:33 +00:00
parent b5b80a93f6
commit 3a00ffacdc
1 changed files with 0 additions and 8 deletions
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8
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
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@ -619,16 +619,8 @@ MachineBasicBlock *ScheduleDAGSDNodes::EmitSchedule() {
// Insert all SDDbgValue's whose order(s) are before "Order". // Insert all SDDbgValue's whose order(s) are before "Order".
if (!MI) if (!MI)
continue; continue;
#ifndef NDEBUG
unsigned LastDIOrder = 0;
#endif
for (; DI != DE && for (; DI != DE &&
(*DI)->getOrder() >= LastOrder && (*DI)->getOrder() < Order; ++DI) { (*DI)->getOrder() >= LastOrder && (*DI)->getOrder() < Order; ++DI) {
#ifndef NDEBUG
assert((*DI)->getOrder() >= LastDIOrder &&
"SDDbgValue nodes must be in source order!");
LastDIOrder = (*DI)->getOrder();
#endif
if ((*DI)->isInvalidated()) if ((*DI)->isInvalidated())
continue; continue;
MachineInstr *DbgMI = Emitter.EmitDbgValue(*DI, VRBaseMap); MachineInstr *DbgMI = Emitter.EmitDbgValue(*DI, VRBaseMap);