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[x86] Enable Broadwell target.

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Added FeatureSMAP.

Broadwell ISA includes Haswell ISA + ADX + RDSEED + SMAP


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216161 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Robert Khasanov 2014-08-21 09:16:12 +00:00
parent 164cd0161e
commit 3a34f5e115
4 changed files with 15 additions and 0 deletions
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9
lib/Target/X86/X86.td
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@ -163,6 +163,8 @@ def FeaturePRFCHW : SubtargetFeature<"prfchw", "HasPRFCHW", "true",
"Support PRFCHW instructions">;
def FeatureRDSEED : SubtargetFeature<"rdseed", "HasRDSEED", "true",
"Support RDSEED instruction">;
def FeatureSMAP : SubtargetFeature<"smap", "HasSMAP", "true",
"Support SMAP instructions">;
def FeatureLeaForSP : SubtargetFeature<"lea-sp", "UseLeaForSP", "true",
"Use LEA for adjusting the stack pointer">;
def FeatureSlowDivide : SubtargetFeature<"idiv-to-divb",
@ -276,6 +278,13 @@ def : ProcessorModel<"core-avx2", HaswellModel,
FeatureBMI, FeatureBMI2, FeatureFMA, FeatureRTM,
FeatureHLE]>;
// Broadwell
def : ProcessorModel<"broadwell", HaswellModel,
[FeatureAVX2, FeatureCMPXCHG16B, FeatureFastUAMem,
FeaturePOPCNT, FeatureAES, FeaturePCLMUL, FeatureRDRAND,
FeatureF16C, FeatureFSGSBase, FeatureMOVBE, FeatureLZCNT,
FeatureBMI, FeatureBMI2, FeatureFMA, FeatureRTM,
FeatureHLE, FeatureADX, FeatureRDSEED, FeatureSMAP]>;
// KNL
// FIXME: define KNL model
def : ProcessorModel<"knl", HaswellModel,

1
lib/Target/X86/X86InstrInfo.td
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@ -752,6 +752,7 @@ def HasSHA : Predicate<"Subtarget->hasSHA()">;
def HasSGX : Predicate<"Subtarget->hasSGX()">;
def HasPRFCHW : Predicate<"Subtarget->hasPRFCHW()">;
def HasRDSEED : Predicate<"Subtarget->hasRDSEED()">;
def HasSMAP : Predicate<"Subtarget->hasSMAP()">;
def HasPrefetchW : Predicate<"Subtarget->hasPRFCHW()">;
def FPStackf32 : Predicate<"!Subtarget->hasSSE1()">;
def FPStackf64 : Predicate<"!Subtarget->hasSSE2()">;

1
lib/Target/X86/X86Subtarget.cpp
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@ -281,6 +281,7 @@ void X86Subtarget::initializeEnvironment() {
HasSGX = false;
HasPRFCHW = false;
HasRDSEED = false;
HasSMAP = false;
IsBTMemSlow = false;
IsSHLDSlow = false;
IsUAMemFast = false;

4
lib/Target/X86/X86Subtarget.h
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@ -148,6 +148,9 @@ protected:
/// HasRDSEED - Processor has RDSEED instructions.
bool HasRDSEED;
/// HasSMAP - Processor has SMAP instructions.
bool HasSMAP;
/// IsBTMemSlow - True if BT (bit test) of memory instructions are slow.
bool IsBTMemSlow;
@ -358,6 +361,7 @@ public:
bool hasSGX() const { return HasSGX; }
bool hasPRFCHW() const { return HasPRFCHW; }
bool hasRDSEED() const { return HasRDSEED; }
bool hasSMAP() const { return HasSMAP; }
bool isBTMemSlow() const { return IsBTMemSlow; }
bool isSHLDSlow() const { return IsSHLDSlow; }
bool isUnalignedMemAccessFast() const { return IsUAMemFast; }