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Add tests for ARMV7M divide instruction use
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103120 91177308-0d34-0410-b5e6-96231b3b80d8
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; RUN: llc < %s -march=arm | FileCheck %s
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; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=CHECK-ARM
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; RUN: llc < %s -march=arm -mcpu=cortex-m3 \
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; RUN: | FileCheck %s -check-prefix=CHECK-ARMV7M
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define i32 @f1(i32 %a, i32 %b) {
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entry:
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; CHECK: f1
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; CHECK: __divsi3
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; CHECK-ARM: f1
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; CHECK-ARM: __divsi3
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; CHECK-ARMV7M: f1
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; CHECK-ARMV7M: sdiv
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%tmp1 = sdiv i32 %a, %b ; <i32> [#uses=1]
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ret i32 %tmp1
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}
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define i32 @f2(i32 %a, i32 %b) {
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entry:
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; CHECK: f2
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; CHECK: __udivsi3
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; CHECK-ARM: f2
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; CHECK-ARM: __udivsi3
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; CHECK-ARMV7M: _f2
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; CHECK-ARMV7M: udiv
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%tmp1 = udiv i32 %a, %b ; <i32> [#uses=1]
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ret i32 %tmp1
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}
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define i32 @f3(i32 %a, i32 %b) {
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entry:
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; CHECK: f3
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; CHECK: __modsi3
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; CHECK-ARM: f3
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; CHECK-ARM: __modsi3
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; CHECK-ARMV7M: _f3
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; CHECK-ARMV7M: sdiv
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%tmp1 = srem i32 %a, %b ; <i32> [#uses=1]
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ret i32 %tmp1
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}
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define i32 @f4(i32 %a, i32 %b) {
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entry:
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; CHECK: f4
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; CHECK: __umodsi3
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; CHECK-ARM: f4
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; CHECK-ARM: __umodsi3
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; CHECK-ARMV7M: _f4
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; CHECK-ARMV7M: udiv
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%tmp1 = urem i32 %a, %b ; <i32> [#uses=1]
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ret i32 %tmp1
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}
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45
test/CodeGen/Thumb2/div.ll
Normal file
45
test/CodeGen/Thumb2/div.ll
Normal file
@ -0,0 +1,45 @@
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; RUN: llc < %s -march=thumb -mattr=+thumb2 \
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; RUN: | FileCheck %s -check-prefix=CHECK-THUMB
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; RUN: llc < %s -march=arm -mcpu=cortex-m3 -mattr=+thumb2 \
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; RUN: | FileCheck %s -check-prefix=CHECK-THUMBV7M
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define i32 @f1(i32 %a, i32 %b) {
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entry:
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; CHECK-THUMB: f1
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; CHECK-THUMB: __divsi3
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; CHECK-THUMBV7M: f1
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; CHECK-THUMBV7M: sdiv
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%tmp1 = sdiv i32 %a, %b ; <i32> [#uses=1]
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ret i32 %tmp1
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}
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define i32 @f2(i32 %a, i32 %b) {
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entry:
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; CHECK-THUMB: f2
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; CHECK-THUMB: __udivsi3
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; CHECK-THUMBV7M: _f2
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; CHECK-THUMBV7M: udiv
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%tmp1 = udiv i32 %a, %b ; <i32> [#uses=1]
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ret i32 %tmp1
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}
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define i32 @f3(i32 %a, i32 %b) {
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entry:
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; CHECK-THUMB: f3
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; CHECK-THUMB: __modsi3
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; CHECK-THUMBV7M: _f3
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; CHECK-THUMBV7M: sdiv
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%tmp1 = srem i32 %a, %b ; <i32> [#uses=1]
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ret i32 %tmp1
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}
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define i32 @f4(i32 %a, i32 %b) {
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entry:
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; CHECK-THUMB: f4
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; CHECK-THUMB: __umodsi3
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; CHECK-THUMBV7M: _f4
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; CHECK-THUMBV7M: udiv
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%tmp1 = urem i32 %a, %b ; <i32> [#uses=1]
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ret i32 %tmp1
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}
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