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SLPVectorizer: When sorting by domination for CSE don't assert on unreachable code.
There is no total ordering if the CFG is disconnected. We don't care if we catch all CSE opportunities in dead code either so just exclude ignore them in the assert. PR19646 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208461 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1827,7 +1827,8 @@ void BoUpSLP::optimizeGatherSequence() {
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for (SmallVectorImpl<BasicBlock *>::iterator I = CSEWorkList.begin(),
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E = CSEWorkList.end();
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I != E; ++I) {
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assert((I == CSEWorkList.begin() || !DT->dominates(*I, *std::prev(I))) &&
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assert((I == CSEWorkList.begin() || !DT->isReachableFromEntry(*I) ||
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!DT->dominates(*I, *std::prev(I))) &&
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"Worklist not sorted properly!");
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BasicBlock *BB = *I;
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// For all instructions in blocks containing gather sequences:
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@ -217,3 +217,33 @@ return: ; preds = %entry, %if.end
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ret i32 0
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}
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%class.B.53.55 = type { %class.A.52.54, double }
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%class.A.52.54 = type { double, double, double }
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@a = external global double, align 8
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define void @PR19646(%class.B.53.55* %this) {
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entry:
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br i1 undef, label %if.end13, label %if.end13
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sw.epilog7: ; No predecessors!
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%.in = getelementptr inbounds %class.B.53.55* %this, i64 0, i32 0, i32 1
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%0 = load double* %.in, align 8
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%add = fadd double undef, 0.000000e+00
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%add6 = fadd double %add, %0
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%1 = load double* @a, align 8
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%add8 = fadd double %1, 0.000000e+00
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%_dy = getelementptr inbounds %class.B.53.55* %this, i64 0, i32 0, i32 2
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%2 = load double* %_dy, align 8
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%add10 = fadd double %add8, %2
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br i1 undef, label %if.then12, label %if.end13
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if.then12: ; preds = %sw.epilog7
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%3 = load double* undef, align 8
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br label %if.end13
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if.end13: ; preds = %if.then12, %sw.epilog7, %entry
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%x.1 = phi double [ 0.000000e+00, %if.then12 ], [ %add6, %sw.epilog7 ], [ undef, %entry ], [ undef, %entry ]
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%b.0 = phi double [ %3, %if.then12 ], [ %add10, %sw.epilog7 ], [ undef, %entry], [ undef, %entry ]
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unreachable
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}
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