From 3b156699381e266b8c620056c139b876524df2eb Mon Sep 17 00:00:00 2001 From: Andrea Di Biagio Date: Thu, 30 Apr 2015 21:03:29 +0000 Subject: [PATCH] Fix for PR23103. Correctly propagate the 'IsUndef' flag to the register operands of a commuted instruction. Revision 220239 exposed a latent bug in method 'TargetInstrInfo::commuteInstruction'. When commuting the operands of a machine instruction, method 'commuteInstruction' didn't correctly propagate the 'IsUndef' flag to the register operands of the new (commuted) instruction. Before this patch, the following instruction: %vreg4 = VADDSDrr %vreg14, %vreg5; FR64:%vreg4,%vreg14,%vreg5 was wrongly converted by method 'commuteInstruction' into: %vreg4 = VADDSDrr %vreg5, %vreg14; FR64:%vreg4,%vreg5,%vreg14 The correct instruction should have been: %vreg4 = VADDSDrr %vreg5, %vreg14; FR64:%vreg4,%vreg5,%vreg14 This patch fixes the problem in method 'TargetInstrInfo::commuteInstruction'. When swapping the operands of a machine instruction, we now make sure that 'IsUndef' flags are correctly set. Added test case 'pr23103.ll'. Differential Revision: http://reviews.llvm.org/D9406 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236258 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/TargetInstrInfo.cpp | 4 ++++ test/CodeGen/X86/pr23103.ll | 21 +++++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 test/CodeGen/X86/pr23103.ll diff --git a/lib/CodeGen/TargetInstrInfo.cpp b/lib/CodeGen/TargetInstrInfo.cpp index 38725b53b37..165df0696ef 100644 --- a/lib/CodeGen/TargetInstrInfo.cpp +++ b/lib/CodeGen/TargetInstrInfo.cpp @@ -142,6 +142,8 @@ MachineInstr *TargetInstrInfo::commuteInstruction(MachineInstr *MI, unsigned SubReg2 = MI->getOperand(Idx2).getSubReg(); bool Reg1IsKill = MI->getOperand(Idx1).isKill(); bool Reg2IsKill = MI->getOperand(Idx2).isKill(); + bool Reg1IsUndef = MI->getOperand(Idx1).isUndef(); + bool Reg2IsUndef = MI->getOperand(Idx2).isUndef(); // If destination is tied to either of the commuted source register, then // it must be updated. if (HasDef && Reg0 == Reg1 && @@ -172,6 +174,8 @@ MachineInstr *TargetInstrInfo::commuteInstruction(MachineInstr *MI, MI->getOperand(Idx1).setSubReg(SubReg2); MI->getOperand(Idx2).setIsKill(Reg1IsKill); MI->getOperand(Idx1).setIsKill(Reg2IsKill); + MI->getOperand(Idx2).setIsUndef(Reg1IsUndef); + MI->getOperand(Idx1).setIsUndef(Reg2IsUndef); return MI; } diff --git a/test/CodeGen/X86/pr23103.ll b/test/CodeGen/X86/pr23103.ll new file mode 100644 index 00000000000..e0508effac0 --- /dev/null +++ b/test/CodeGen/X86/pr23103.ll @@ -0,0 +1,21 @@ +; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx < %s | FileCheck %s + +; When commuting a VADDSDrr instruction, verify that the 'IsUndef' flag is +; correctly propagated to the operands of the resulting instruction. +; Test for PR23103; + +declare zeroext i1 @foo(<1 x double>) + +define <1 x double> @pr23103(<1 x double>* align 8 %Vp) { +; CHECK-LABEL: pr23103: +; CHECK: vmovsd (%rdi), %xmm0 +; CHECK-NEXT: vmovsd %xmm0, {{.*}}(%rsp) {{.*#+}} 8-byte Spill +; CHECK-NEXT: callq foo +; CHECK-NEXT: vaddsd {{.*}}(%rsp), %xmm0, %xmm0 {{.*#+}} 8-byte Folded Reload +; CHECK: retq +entry: + %V = load <1 x double>, <1 x double>* %Vp, align 8 + %call = call zeroext i1 @foo(<1 x double> %V) + %fadd = fadd <1 x double> %V, undef + ret <1 x double> %fadd +}