From 3b96e1fe3b695e6d845668ea90d75016f0f46a17 Mon Sep 17 00:00:00 2001 From: Devang Patel Date: Tue, 24 Jan 2012 21:43:36 +0000 Subject: [PATCH] Intel Syntax: Extend special hand coded logic, to recognize special instructions, for intel syntax. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148864 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/AsmParser/X86AsmParser.cpp | 20 +++++++++++++++----- test/MC/X86/intel-syntax-encoding.s | 3 +++ 2 files changed, 18 insertions(+), 5 deletions(-) diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index d78ac9f1c7a..82732d8542e 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -1168,11 +1168,21 @@ ParseInstruction(StringRef Name, SMLoc NameLoc, Name.startswith("rcl") || Name.startswith("rcr") || Name.startswith("rol") || Name.startswith("ror")) && Operands.size() == 3) { - X86Operand *Op1 = static_cast(Operands[1]); - if (Op1->isImm() && isa(Op1->getImm()) && - cast(Op1->getImm())->getValue() == 1) { - delete Operands[1]; - Operands.erase(Operands.begin() + 1); + if (getParser().getAssemblerDialect()) { + // Intel syntax + X86Operand *Op1 = static_cast(Operands[2]); + if (Op1->isImm() && isa(Op1->getImm()) && + cast(Op1->getImm())->getValue() == 1) { + delete Operands[2]; + Operands.pop_back(); + } + } else { + X86Operand *Op1 = static_cast(Operands[1]); + if (Op1->isImm() && isa(Op1->getImm()) && + cast(Op1->getImm())->getValue() == 1) { + delete Operands[1]; + Operands.erase(Operands.begin() + 1); + } } } diff --git a/test/MC/X86/intel-syntax-encoding.s b/test/MC/X86/intel-syntax-encoding.s index efd7b6b6669..3e7ad355f46 100644 --- a/test/MC/X86/intel-syntax-encoding.s +++ b/test/MC/X86/intel-syntax-encoding.s @@ -36,3 +36,6 @@ LBB0_3: jmp LBB0_3 // CHECK: encoding: [0xf2,0x0f,0x10,0x2c,0x25,0xf8,0xff,0xff,0xff] movsd XMM5, QWORD PTR [-8] + +// CHECK: encoding: [0xd1,0xe7] + shl EDI, 1