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Allow use of the 16-bit literal move instruction in CMOVs for ARM mode.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115884 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
2010-10-07 00:42:42 +00:00
parent 1bb9adae4c
commit 3bbdcea49a
4 changed files with 32 additions and 17 deletions
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14
utils/TableGen/ARMDecoderEmitter.cpp
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@ -1610,13 +1610,13 @@ bool ARMDecoderEmitter::ARMDEBackend::populateInstruction(
// better off using the generic RSCri and RSCrs instructions.
if (Name == "RSCSri" || Name == "RSCSrs") return false;
// MOVCCr, MOVCCs, MOVCCi, FCYPScc, FCYPDcc, FNEGScc, and FNEGDcc are used
// in the compiler to implement conditional moves. We can ignore them in
// favor of their more generic versions of instructions.
// See also SDNode *ARMDAGToDAGISel::Select(SDValue Op).
if (Name == "MOVCCr" || Name == "MOVCCs" || Name == "MOVCCi" ||
Name == "FCPYScc" || Name == "FCPYDcc" ||
Name == "FNEGScc" || Name == "FNEGDcc")
// MOVCCr, MOVCCs, MOVCCi, MOVCCi16, FCYPScc, FCYPDcc, FNEGScc, and
// FNEGDcc are used in the compiler to implement conditional moves.
// We can ignore them in favor of their more generic versions of
// instructions. See also SDNode *ARMDAGToDAGISel::Select(SDValue Op).
if (Name == "MOVCCr" || Name == "MOVCCs" || Name == "MOVCCi" ||
Name == "MOVCCi16" || Name == "FCPYScc" || Name == "FCPYDcc" ||
Name == "FNEGScc" || Name == "FNEGDcc")
return false;
// Ditto for VMOVDcc, VMOVScc, VNEGDcc, and VNEGScc.