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Expand 64bit {SHL,SHR,SRA}_PARTS on sparcv9.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201718 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Roman Divacky 2014-02-19 21:35:39 +00:00
parent b4aaffffd3
commit 3bd3f426a5
2 changed files with 18 additions and 0 deletions
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4
lib/Target/Sparc/SparcISelLowering.cpp
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@ -1556,6 +1556,10 @@ SparcTargetLowering::SparcTargetLowering(TargetMachine &TM)
setOperationAction(ISD::UMULO, MVT::i64, Custom);
setOperationAction(ISD::SMULO, MVT::i64, Custom);
setOperationAction(ISD::SHL_PARTS, MVT::i64, Expand);
setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand);
setOperationAction(ISD::SRL_PARTS, MVT::i64, Expand);
}
// VASTART needs to be custom lowered to use the VarArgsFrameIndex.

14
test/CodeGen/SPARC/parts.ll Normal file
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@ -0,0 +1,14 @@
; RUN: llc < %s -march=sparcv9 | FileCheck %s
; CHECK-LABEL: test
; CHECK: srl %i1, 0, %o2
; CHECK-NEXT: or %g0, %i2, %o0
; CHECK-NEXT: call __ashlti3
; CHECK-NEXT: or %g0, %i3, %o1
; CHECK-NEXT: or %g0, %o0, %i0
define i128 @test(i128 %a, i128 %b) {
entry:
%tmp = shl i128 %b, %a
ret i128 %tmp
}