From 3c262eec5354766bab7b37efc8d203a7afe91458 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Fri, 26 Mar 2010 02:13:13 +0000 Subject: [PATCH] Allow trivial sibcall of vararg callee when no arguments are being passed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99598 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 5 +++-- test/CodeGen/X86/pic.ll | 8 ++++---- test/CodeGen/X86/sibcall.ll | 31 ++++++++++++++++++++++++++++++ test/CodeGen/X86/xor-icmp.ll | 4 ++-- 4 files changed, 40 insertions(+), 8 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 75e6f505484..d08dfc4eab5 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -2301,8 +2301,9 @@ X86TargetLowering::IsEligibleForTailCallOptimization(SDValue Callee, // Look for obvious safe cases to perform tail call optimization that does not // requite ABI changes. This is what gcc calls sibcall. - // Do not sibcall optimize vararg calls for now. - if (isVarArg) + // Do not sibcall optimize vararg calls unless the call site is not passing any + // arguments. + if (isVarArg && !Outs.empty()) return false; // Also avoid sibcall optimization if either caller or callee uses struct diff --git a/test/CodeGen/X86/pic.ll b/test/CodeGen/X86/pic.ll index e997233a519..35b172509c9 100644 --- a/test/CodeGen/X86/pic.ll +++ b/test/CodeGen/X86/pic.ll @@ -194,10 +194,10 @@ bb12: ; LINUX: .LJTI8_0: ; LINUX: .long .LBB8_2@GOTOFF -; LINUX: .long .LBB8_2@GOTOFF -; LINUX: .long .LBB8_7@GOTOFF -; LINUX: .long .LBB8_3@GOTOFF -; LINUX: .long .LBB8_7@GOTOFF +; LINUX: .long .LBB8_8@GOTOFF +; LINUX: .long .LBB8_14@GOTOFF +; LINUX: .long .LBB8_9@GOTOFF +; LINUX: .long .LBB8_10@GOTOFF } declare void @foo1(...) diff --git a/test/CodeGen/X86/sibcall.ll b/test/CodeGen/X86/sibcall.ll index ce35b454518..541e7506b8b 100644 --- a/test/CodeGen/X86/sibcall.ll +++ b/test/CodeGen/X86/sibcall.ll @@ -271,3 +271,34 @@ entry: } declare double @bar4() + +; rdar://6283267 +define void @t17() nounwind ssp { +entry: +; 32: t17: +; 32: jmp {{_?}}bar5 + +; 64: t17: +; 64: xorb %al, %al +; 64: jmp {{_?}}bar5 + tail call void (...)* @bar5() nounwind + ret void +} + +declare void @bar5(...) + +; rdar://7774847 +define void @t18() nounwind ssp { +entry: +; 32: t18: +; 32: call {{_?}}bar6 +; 32: fstp %st(0) + +; 64: t18: +; 64: xorb %al, %al +; 64: jmp {{_?}}bar6 + %0 = tail call double (...)* @bar6() nounwind + ret void +} + +declare double @bar6(...) diff --git a/test/CodeGen/X86/xor-icmp.ll b/test/CodeGen/X86/xor-icmp.ll index 2d75c5d7620..34875ed8995 100644 --- a/test/CodeGen/X86/xor-icmp.ll +++ b/test/CodeGen/X86/xor-icmp.ll @@ -43,7 +43,7 @@ define i32 @t2(i32 %x, i32 %y) nounwind ssp { ; X32: cmpl ; X32: sete ; X32-NOT: xor -; X32: je +; X32: jne ; X64: t2: ; X64: testl @@ -51,7 +51,7 @@ define i32 @t2(i32 %x, i32 %y) nounwind ssp { ; X64: testl ; X64: sete ; X64-NOT: xor -; X64: je +; X64: jne entry: %0 = icmp eq i32 %x, 0 ; [#uses=1] %1 = icmp eq i32 %y, 0 ; [#uses=1]