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https://github.com/c64scene-ar/llvm-6502.git
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Handle 'r' inline asm constraint
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79648 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -164,6 +164,46 @@ SDValue SystemZTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
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}
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}
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//===----------------------------------------------------------------------===//
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// SystemZ Inline Assembly Support
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//===----------------------------------------------------------------------===//
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/// getConstraintType - Given a constraint letter, return the type of
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/// constraint it is for this target.
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TargetLowering::ConstraintType
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SystemZTargetLowering::getConstraintType(const std::string &Constraint) const {
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if (Constraint.size() == 1) {
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switch (Constraint[0]) {
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case 'r':
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return C_RegisterClass;
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default:
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break;
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}
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}
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return TargetLowering::getConstraintType(Constraint);
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}
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std::pair<unsigned, const TargetRegisterClass*>
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SystemZTargetLowering::
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getRegForInlineAsmConstraint(const std::string &Constraint,
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EVT VT) const {
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if (Constraint.size() == 1) {
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// GCC Constraint Letters
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switch (Constraint[0]) {
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default: break;
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case 'r': // GENERAL_REGS
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if (VT == MVT::i32)
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return std::make_pair(0U, SystemZ::GR32RegisterClass);
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else if (VT == MVT::i128)
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return std::make_pair(0U, SystemZ::GR128RegisterClass);
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return std::make_pair(0U, SystemZ::GR64RegisterClass);
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}
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}
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return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
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}
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//===----------------------------------------------------------------------===//
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// Calling Convention Implementation
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//===----------------------------------------------------------------------===//
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@ -69,6 +69,11 @@ namespace llvm {
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return 1;
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}
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std::pair<unsigned, const TargetRegisterClass*>
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getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const;
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TargetLowering::ConstraintType
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getConstraintType(const std::string &Constraint) const;
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SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG);
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SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
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SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
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103
test/CodeGen/SystemZ/2009-08-21-InlineAsmRConstraint.ll
Normal file
103
test/CodeGen/SystemZ/2009-08-21-InlineAsmRConstraint.ll
Normal file
@ -0,0 +1,103 @@
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; RUN: llvm-as < %s | llc
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:16:16-f128:128:128"
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target triple = "s390x-ibm-linux-gnu"
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%0 = type { i64 }
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%struct.anon = type { %struct.dwarf_fde* }
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%struct.dwarf_fde = type <{ i32, i32, [0 x i8] }>
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%struct.object = type { i8*, i8*, i8*, %struct.anon, %0, %struct.object* }
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@__dso_handle = hidden global i8* null ; <i8**> [#uses=0]
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@__CTOR_LIST__ = internal global [1 x void ()*] [void ()* inttoptr (i64 -1 to void ()*)], section ".ctors", align 8 ; <[1 x void ()*]*> [#uses=1]
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@__DTOR_LIST__ = internal global [1 x void ()*] [void ()* inttoptr (i64 -1 to void ()*)], section ".dtors", align 8 ; <[1 x void ()*]*> [#uses=2]
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@__EH_FRAME_BEGIN__ = internal constant [0 x i8] zeroinitializer, section ".eh_frame", align 4 ; <[0 x i8]*> [#uses=1]
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@__JCR_LIST__ = internal global [0 x i8*] zeroinitializer, section ".jcr", align 8 ; <[0 x i8*]*> [#uses=2]
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@completed.1298.b = internal global i1 false ; <i1*> [#uses=2]
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@p.1296 = internal global void ()** getelementptr ([1 x void ()*]* @__DTOR_LIST__, i64 1, i64 0) ; <void ()***> [#uses=3]
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@object.1314 = internal global %struct.object zeroinitializer ; <%struct.object*> [#uses=1]
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@llvm.used = appending global [7 x i8*] [i8* bitcast ([1 x void ()*]* @__CTOR_LIST__ to i8*), i8* bitcast ([1 x void ()*]* @__DTOR_LIST__ to i8*), i8* getelementptr inbounds ([0 x i8]* @__EH_FRAME_BEGIN__, i32 0, i32 0), i8* bitcast (void ()* @__do_global_dtors_aux to i8*), i8* bitcast (void ()* @call___do_global_dtors_aux to i8*), i8* bitcast (void ()* @frame_dummy to i8*), i8* bitcast (void ()* @call_frame_dummy to i8*)], section "llvm.metadata" ; <[7 x i8*]*> [#uses=0]
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define internal void @__do_global_dtors_aux() nounwind {
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entry:
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%.b = load i1* @completed.1298.b ; <i1> [#uses=1]
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br i1 %.b, label %return, label %bb1.preheader
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bb1.preheader: ; preds = %entry
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%0 = load void ()*** @p.1296, align 8 ; <void ()**> [#uses=2]
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%1 = load void ()** %0, align 8 ; <void ()*> [#uses=2]
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%2 = icmp eq void ()* %1, null ; <i1> [#uses=1]
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br i1 %2, label %bb2, label %bb
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bb: ; preds = %bb, %bb1.preheader
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%3 = phi void ()** [ %0, %bb1.preheader ], [ %6, %bb ] ; <void ()**> [#uses=1]
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%4 = phi void ()* [ %1, %bb1.preheader ], [ %7, %bb ] ; <void ()*> [#uses=1]
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%5 = getelementptr inbounds void ()** %3, i64 1 ; <void ()**> [#uses=1]
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store void ()** %5, void ()*** @p.1296, align 8
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tail call void %4() nounwind
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%6 = load void ()*** @p.1296, align 8 ; <void ()**> [#uses=2]
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%7 = load void ()** %6, align 8 ; <void ()*> [#uses=2]
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%8 = icmp eq void ()* %7, null ; <i1> [#uses=1]
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br i1 %8, label %bb2, label %bb
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bb2: ; preds = %bb, %bb1.preheader
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br i1 icmp ne (i8* (i8*)* @__deregister_frame_info, i8* (i8*)* null), label %bb3, label %bb4
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bb3: ; preds = %bb2
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%9 = tail call i8* @__deregister_frame_info(i8* getelementptr inbounds ([0 x i8]* @__EH_FRAME_BEGIN__, i32 0, i32 0)) nounwind ; <i8*> [#uses=0]
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br label %bb4
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bb4: ; preds = %bb2, %bb3
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store i1 true, i1* @completed.1298.b
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ret void
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return: ; preds = %entry
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ret void
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}
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declare extern_weak i8* @__deregister_frame_info(i8*)
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define internal void @call___do_global_dtors_aux() nounwind {
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entry:
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tail call void asm sideeffect "\09.section\09.fini", ""() nounwind
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tail call void @__do_global_dtors_aux() nounwind
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tail call void asm sideeffect ".text", ""() nounwind
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ret void
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}
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define internal void @frame_dummy() nounwind {
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entry:
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br i1 icmp ne (void (i8*, %struct.object*)* @__register_frame_info, void (i8*, %struct.object*)* null), label %bb, label %bb1
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bb: ; preds = %entry
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tail call void @__register_frame_info(i8* getelementptr inbounds ([0 x i8]* @__EH_FRAME_BEGIN__, i32 0, i32 0), %struct.object* @object.1314) nounwind
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br label %bb1
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bb1: ; preds = %entry, %bb
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%0 = load i8** getelementptr inbounds ([0 x i8*]* @__JCR_LIST__, i64 0, i64 0), align 8 ; <i8*> [#uses=1]
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%1 = icmp eq i8* %0, null ; <i1> [#uses=1]
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br i1 %1, label %return, label %bb2
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bb2: ; preds = %bb1
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%asmtmp = tail call void (i8*)* (void (i8*)*)* asm "", "=r,0"(void (i8*)* @_Jv_RegisterClasses) nounwind ; <void (i8*)*> [#uses=2]
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%2 = icmp eq void (i8*)* %asmtmp, null ; <i1> [#uses=1]
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br i1 %2, label %return, label %bb3
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bb3: ; preds = %bb2
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tail call void %asmtmp(i8* bitcast ([0 x i8*]* @__JCR_LIST__ to i8*)) nounwind
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ret void
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return: ; preds = %bb2, %bb1
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ret void
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}
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declare extern_weak void @__register_frame_info(i8*, %struct.object*)
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declare extern_weak void @_Jv_RegisterClasses(i8*)
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define internal void @call_frame_dummy() nounwind {
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entry:
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tail call void asm sideeffect "\09.section\09.init", ""() nounwind
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tail call void @frame_dummy() nounwind
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tail call void asm sideeffect ".text", ""() nounwind
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ret void
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}
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