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R600: Emit function name in the AsmPrinter
Emitting the function name allows us to check for it in the FileCheck tests so we can make sure FileCheck is checking the output of the correct function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174392 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -47,6 +47,9 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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#endif
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}
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SetupMachineFunction(MF);
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if (OutStreamer.hasRawTextSupport()) {
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OutStreamer.EmitRawText("@" + MF.getName() + ":");
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}
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OutStreamer.SwitchSection(getObjFileLowering().getTextSection());
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if (STM.device()->getGeneration() > AMDGPUDeviceInfo::HD6XXX) {
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EmitProgramInfo(MF);
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@ -1,13 +1,15 @@
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;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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;CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; This test is for a bug in
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; DAGCombiner::reduceBuildVecConvertToConvertBuildVec() where
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; the wrong type was being passed to
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; TargetLowering::getOperationAction() when checking the legality of
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; ISD::UINT_TO_FP and ISD::SINT_TO_FP opcodes.
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; CHECK: @sint
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; CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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define void @sint(<4 x float> addrspace(1)* %out, i32 addrspace(1)* %in) {
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entry:
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%ptr = getelementptr i32 addrspace(1)* %in, i32 1
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@ -19,6 +21,7 @@ entry:
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ret void
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}
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;CHECK: @uint
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;CHECK: UINT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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define void @uint(<4 x float> addrspace(1)* %out, i32 addrspace(1)* %in) {
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@ -6,6 +6,7 @@
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; or
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; ADD_INT literal.x REG, 5
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; CHECK; @i32_literal
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; CHECK: ADD_INT {{[A-Z0-9,. ]*}}literal.x,{{[A-Z0-9,. ]*}} 5
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define void @i32_literal(i32 addrspace(1)* %out, i32 %in) {
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entry:
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@ -20,6 +21,7 @@ entry:
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; or
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; ADD literal.x REG, 5.0
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; CHECK: @float_literal
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; CHECK: ADD {{[A-Z0-9,. ]*}}literal.x,{{[A-Z0-9,. ]*}} {{[0-9]+}}(5.0
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define void @float_literal(float addrspace(1)* %out, float %in) {
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entry:
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@ -1,5 +1,6 @@
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; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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; CHECK: @i8_arg
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; CHECK: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}}
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define void @i8_arg(i32 addrspace(1)* nocapture %out, i8 %in) nounwind {
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@ -9,6 +10,7 @@ entry:
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ret void
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}
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; CHECK: @i8_zext_arg
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; CHECK: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}}
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define void @i8_zext_arg(i32 addrspace(1)* nocapture %out, i8 zeroext %in) nounwind {
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@ -18,6 +20,7 @@ entry:
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ret void
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}
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; CHECK: @i16_arg
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; CHECK: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}}
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define void @i16_arg(i32 addrspace(1)* nocapture %out, i16 %in) nounwind {
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@ -27,6 +30,7 @@ entry:
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ret void
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}
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; CHECK: @i16_zext_arg
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; CHECK: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}}
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define void @i16_zext_arg(i32 addrspace(1)* nocapture %out, i16 zeroext %in) nounwind {
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@ -1,5 +1,6 @@
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; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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; CHECK: @fp_to_sint
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; CHECK: FLT_TO_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; CHECK: FLT_TO_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; CHECK: FLT_TO_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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@ -12,6 +13,7 @@ define void @fp_to_sint(<4 x i32> addrspace(1)* %out, <4 x float> addrspace(1)*
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ret void
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}
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; CHECK: @fp_to_uint
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; CHECK: FLT_TO_UINT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; CHECK: FLT_TO_UINT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; CHECK: FLT_TO_UINT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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@ -24,6 +26,7 @@ define void @fp_to_uint(<4 x i32> addrspace(1)* %out, <4 x float> addrspace(1)*
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ret void
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}
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; CHECK: @sint_to_fp
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; CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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@ -36,6 +39,7 @@ define void @sint_to_fp(<4 x float> addrspace(1)* %out, <4 x i32> addrspace(1)*
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ret void
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}
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; CHECK: @uint_to_fp
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; CHECK: UINT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; CHECK: UINT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; CHECK: UINT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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