From 3d0f5afefb2c8be6233c2bcebdcf57a5c0b2b9a2 Mon Sep 17 00:00:00 2001 From: Duncan Sands Date: Thu, 30 Oct 2008 20:26:50 +0000 Subject: [PATCH] Fix PR2986: do not use a potentially illegal type for the shift amount type. Add a check that shifts and rotates use the type returned by getShiftAmountTy for the amount. This exposed some problems in CellSPU and PPC, which have already been fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58455 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 0c737261aa6..3601b6e0e04 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -2390,6 +2390,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, "Shift operators return type must be the same as their first arg"); assert(VT.isInteger() && N2.getValueType().isInteger() && "Shifts only work on integers"); + assert(N2.getValueType() == TLI.getShiftAmountTy() && + "Wrong type for shift amount"); // Always fold shifts of i1 values so the code generator doesn't need to // handle them. Since we know the size of the shift has to be less than the @@ -2763,12 +2765,15 @@ static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) { return DAG.getConstantFP(APFloat(Val), VT); } + const TargetLowering &TLI = DAG.getTargetLoweringInfo(); Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value); unsigned Shift = 8; for (unsigned i = NumBits; i > 8; i >>= 1) { Value = DAG.getNode(ISD::OR, VT, DAG.getNode(ISD::SHL, VT, Value, - DAG.getConstant(Shift, MVT::i8)), Value); + DAG.getConstant(Shift, + TLI.getShiftAmountTy())), + Value); Shift <<= 1; }