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https://github.com/c64scene-ar/llvm-6502.git
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Teach instcombine 4 new xforms:
(add (sext x), cst) --> (sext (add x, cst')) (add (sext x), (sext y)) --> (sext (add int x, y)) (add double (sitofp x), fpcst) --> (sitofp (add int x, intcst)) (add double (sitofp x), (sitofp y)) --> (sitofp (add int x, y)) This generally reduces conversions. For example MiBench/telecomm-gsm gets these simplifications: HACK2: %tmp67.i142.i.i = sext i16 %tmp6.i141.i.i to i32 ; <i32> [#uses=1] %tmp23.i139.i.i = sext i16 %tmp2.i138.i.i to i32 ; <i32> [#uses=1] %tmp8.i143.i.i = add i32 %tmp67.i142.i.i, %tmp23.i139.i.i ; <i32> [#uses=3] HACK2: %tmp67.i121.i.i = sext i16 %tmp6.i120.i.i to i32 ; <i32> [#uses=1] %tmp23.i118.i.i = sext i16 %tmp2.i117.i.i to i32 ; <i32> [#uses=1] %tmp8.i122.i.i = add i32 %tmp67.i121.i.i, %tmp23.i118.i.i ; <i32> [#uses=3] HACK2: %tmp67.i.i190.i = sext i16 %tmp6.i.i189.i to i32 ; <i32> [#uses=1] %tmp23.i.i187.i = sext i16 %tmp2.i.i186.i to i32 ; <i32> [#uses=1] %tmp8.i.i191.i = add i32 %tmp67.i.i190.i, %tmp23.i.i187.i ; <i32> [#uses=3] HACK2: %tmp67.i173.i.i.i = sext i16 %tmp6.i172.i.i.i to i32 ; <i32> [#uses=1] %tmp23.i170.i.i.i = sext i16 %tmp2.i169.i.i.i to i32 ; <i32> [#uses=1] %tmp8.i174.i.i.i = add i32 %tmp67.i173.i.i.i, %tmp23.i170.i.i.i ; <i32> [#uses=3] HACK2: %tmp67.i152.i.i.i = sext i16 %tmp6.i151.i.i.i to i32 ; <i32> [#uses=1] %tmp23.i149.i.i.i = sext i16 %tmp2.i148.i.i.i to i32 ; <i32> [#uses=1] %tmp8.i153.i.i.i = add i32 %tmp67.i152.i.i.i, %tmp23.i149.i.i.i ; <i32> [#uses=3] HACK2: %tmp67.i.i.i.i = sext i16 %tmp6.i.i.i.i to i32 ; <i32> [#uses=1] %tmp23.i.i5.i.i = sext i16 %tmp2.i.i.i.i to i32 ; <i32> [#uses=1] %tmp8.i.i7.i.i = add i32 %tmp67.i.i.i.i, %tmp23.i.i5.i.i ; <i32> [#uses=3] This also fixes a bug in ComputeNumSignBits handling select and makes it more aggressive with and/or. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51302 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -241,6 +241,7 @@ namespace {
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Instruction *transformCallThroughTrampoline(CallSite CS);
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Instruction *transformZExtICmp(ICmpInst *ICI, Instruction &CI,
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bool DoXform = true);
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bool WillNotOverflowSignedAdd(Value *LHS, Value *RHS);
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public:
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// InsertNewInstBefore - insert an instruction New before instruction Old
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@ -377,7 +378,7 @@ namespace {
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Value *EvaluateInDifferentType(Value *V, const Type *Ty, bool isSigned);
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void ComputeMaskedBits(Value *V, const APInt &Mask, APInt& KnownZero,
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void ComputeMaskedBits(Value *V, const APInt &Mask, APInt& KnownZero,
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APInt& KnownOne, unsigned Depth = 0) const;
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bool MaskedValueIsZero(Value *V, const APInt& Mask, unsigned Depth = 0);
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unsigned ComputeNumSignBits(Value *Op, unsigned Depth = 0) const;
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@ -2100,7 +2101,48 @@ unsigned InstCombiner::ComputeNumSignBits(Value *V, unsigned Depth) const{
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}
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break;
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case Instruction::And:
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// Logical binary ops preserve the number of sign bits at the worst.
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Tmp = ComputeNumSignBits(U->getOperand(0), Depth+1);
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if (Tmp != 1) {
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Tmp2 = ComputeNumSignBits(U->getOperand(1), Depth+1);
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Tmp = std::min(Tmp, Tmp2);
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}
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// X & C has sign bits equal to C if C's top bits are zeros.
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if (ConstantInt *C = dyn_cast<ConstantInt>(U->getOperand(1))) {
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// See what bits are known to be zero on the output.
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APInt KnownZero(TyBits, 0), KnownOne(TyBits, 0);
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APInt Mask = APInt::getAllOnesValue(TyBits);
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ComputeMaskedBits(U->getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
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KnownZero |= ~C->getValue();
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// If we know that we have leading zeros, we know we have at least that
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// many sign bits.
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Tmp = std::max(Tmp, KnownZero.countLeadingOnes());
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}
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return Tmp;
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case Instruction::Or:
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// Logical binary ops preserve the number of sign bits at the worst.
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Tmp = ComputeNumSignBits(U->getOperand(0), Depth+1);
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if (Tmp != 1) {
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Tmp2 = ComputeNumSignBits(U->getOperand(1), Depth+1);
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Tmp = std::min(Tmp, Tmp2);
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}
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// X & C has sign bits equal to C if C's top bits are zeros.
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if (ConstantInt *C = dyn_cast<ConstantInt>(U->getOperand(1))) {
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// See what bits are known to be one on the output.
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APInt KnownZero(TyBits, 0), KnownOne(TyBits, 0);
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APInt Mask = APInt::getAllOnesValue(TyBits);
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ComputeMaskedBits(U->getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
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KnownOne |= C->getValue();
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// If we know that we have leading ones, we know we have at least that
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// many sign bits.
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Tmp = std::max(Tmp, KnownOne.countLeadingOnes());
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}
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return Tmp;
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case Instruction::Xor: // NOT is handled here.
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// Logical binary ops preserve the number of sign bits.
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Tmp = ComputeNumSignBits(U->getOperand(0), Depth+1);
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@ -2109,9 +2151,9 @@ unsigned InstCombiner::ComputeNumSignBits(Value *V, unsigned Depth) const{
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return std::min(Tmp, Tmp2);
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case Instruction::Select:
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Tmp = ComputeNumSignBits(U->getOperand(0), Depth+1);
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Tmp = ComputeNumSignBits(U->getOperand(1), Depth+1);
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if (Tmp == 1) return 1; // Early out.
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Tmp2 = ComputeNumSignBits(U->getOperand(1), Depth+1);
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Tmp2 = ComputeNumSignBits(U->getOperand(2), Depth+1);
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return std::min(Tmp, Tmp2);
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case Instruction::Add:
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@ -2506,6 +2548,32 @@ static bool CannotBeNegativeZero(const Value *V) {
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return false;
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}
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/// WillNotOverflowSignedAdd - Return true if we can prove that:
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/// (sext (add LHS, RHS)) === (add (sext LHS), (sext RHS))
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/// This basically requires proving that the add in the original type would not
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/// overflow to change the sign bit or have a carry out.
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bool InstCombiner::WillNotOverflowSignedAdd(Value *LHS, Value *RHS) {
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// There are different heuristics we can use for this. Here are some simple
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// ones.
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// Add has the property that adding any two 2's complement numbers can only
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// have one carry bit which can change a sign. As such, if LHS and RHS each
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// have at least two sign bits, we know that the addition of the two values will
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// sign extend fine.
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if (ComputeNumSignBits(LHS) > 1 && ComputeNumSignBits(RHS) > 1)
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return true;
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// If one of the operands only has one non-zero bit, and if the other operand
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// has a known-zero bit in a more significant place than it (not including the
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// sign bit) the ripple may go up to and fill the zero, but won't change the
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// sign. For example, (X & ~4) + 1.
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// TODO: Implement.
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return false;
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}
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Instruction *InstCombiner::visitAdd(BinaryOperator &I) {
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bool Changed = SimplifyCommutative(I);
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@ -2781,6 +2849,84 @@ Instruction *InstCombiner::visitAdd(BinaryOperator &I) {
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if (CFP->getValueAPF().isPosZero() && CannotBeNegativeZero(LHS))
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return ReplaceInstUsesWith(I, LHS);
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// Check for (add (sext x), y), see if we can merge this into an
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// integer add followed by a sext.
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if (SExtInst *LHSConv = dyn_cast<SExtInst>(LHS)) {
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// (add (sext x), cst) --> (sext (add x, cst'))
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if (ConstantInt *RHSC = dyn_cast<ConstantInt>(RHS)) {
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Constant *CI =
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ConstantExpr::getTrunc(RHSC, LHSConv->getOperand(0)->getType());
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if (LHSConv->hasOneUse() &&
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ConstantExpr::getSExt(CI, I.getType()) == RHSC &&
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WillNotOverflowSignedAdd(LHSConv->getOperand(0), CI)) {
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// Insert the new, smaller add.
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Instruction *NewAdd = BinaryOperator::CreateAdd(LHSConv->getOperand(0),
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CI, "addconv");
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InsertNewInstBefore(NewAdd, I);
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return new SExtInst(NewAdd, I.getType());
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}
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}
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// (add (sext x), (sext y)) --> (sext (add int x, y))
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if (SExtInst *RHSConv = dyn_cast<SExtInst>(RHS)) {
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// Only do this if x/y have the same type, if at last one of them has a
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// single use (so we don't increase the number of sexts), and if the
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// integer add will not overflow.
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if (LHSConv->getOperand(0)->getType()==RHSConv->getOperand(0)->getType()&&
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(LHSConv->hasOneUse() || RHSConv->hasOneUse()) &&
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WillNotOverflowSignedAdd(LHSConv->getOperand(0),
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RHSConv->getOperand(0))) {
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// Insert the new integer add.
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Instruction *NewAdd = BinaryOperator::CreateAdd(LHSConv->getOperand(0),
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RHSConv->getOperand(0),
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"addconv");
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InsertNewInstBefore(NewAdd, I);
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return new SExtInst(NewAdd, I.getType());
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}
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}
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}
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// Check for (add double (sitofp x), y), see if we can merge this into an
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// integer add followed by a promotion.
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if (SIToFPInst *LHSConv = dyn_cast<SIToFPInst>(LHS)) {
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// (add double (sitofp x), fpcst) --> (sitofp (add int x, intcst))
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// ... if the constant fits in the integer value. This is useful for things
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// like (double)(x & 1234) + 4.0 -> (double)((X & 1234)+4) which no longer
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// requires a constant pool load, and generally allows the add to be better
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// instcombined.
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if (ConstantFP *CFP = dyn_cast<ConstantFP>(RHS)) {
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Constant *CI =
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ConstantExpr::getFPToSI(CFP, LHSConv->getOperand(0)->getType());
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if (LHSConv->hasOneUse() &&
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ConstantExpr::getSIToFP(CI, I.getType()) == CFP &&
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WillNotOverflowSignedAdd(LHSConv->getOperand(0), CI)) {
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// Insert the new integer add.
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Instruction *NewAdd = BinaryOperator::CreateAdd(LHSConv->getOperand(0),
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CI, "addconv");
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InsertNewInstBefore(NewAdd, I);
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return new SIToFPInst(NewAdd, I.getType());
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}
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}
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// (add double (sitofp x), (sitofp y)) --> (sitofp (add int x, y))
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if (SIToFPInst *RHSConv = dyn_cast<SIToFPInst>(RHS)) {
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// Only do this if x/y have the same type, if at last one of them has a
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// single use (so we don't increase the number of int->fp conversions),
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// and if the integer add will not overflow.
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if (LHSConv->getOperand(0)->getType()==RHSConv->getOperand(0)->getType()&&
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(LHSConv->hasOneUse() || RHSConv->hasOneUse()) &&
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WillNotOverflowSignedAdd(LHSConv->getOperand(0),
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RHSConv->getOperand(0))) {
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// Insert the new integer add.
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Instruction *NewAdd = BinaryOperator::CreateAdd(LHSConv->getOperand(0),
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RHSConv->getOperand(0),
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"addconv");
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InsertNewInstBefore(NewAdd, I);
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return new SIToFPInst(NewAdd, I.getType());
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}
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}
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}
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return Changed ? &I : 0;
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}
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14
test/Transforms/InstCombine/add-shrink.ll
Normal file
14
test/Transforms/InstCombine/add-shrink.ll
Normal file
@ -0,0 +1,14 @@
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; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {add i32}
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; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep sext | count 1
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; Should only have one sext and the add should be i32 instead of i64.
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define i64 @test1(i32 %A) {
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%B = ashr i32 %A, 7 ; <i32> [#uses=1]
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%C = ashr i32 %A, 9 ; <i32> [#uses=1]
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%D = sext i32 %B to i64 ; <i64> [#uses=1]
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%E = sext i32 %C to i64 ; <i64> [#uses=1]
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%F = add i64 %D, %E ; <i64> [#uses=1]
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ret i64 %F
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}
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ret i32 %E
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}
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define i32 @test6(i32 %A) {
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%B = and i32 %A, 7 ; <i32> [#uses=1]
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%C = and i32 %A, 32 ; <i32> [#uses=1]
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%D = sitofp i32 %B to double ; <double> [#uses=1]
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%E = sitofp i32 %C to double ; <double> [#uses=1]
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%F = add double %D, %E ; <double> [#uses=1]
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%G = fptosi double %F to i32 ; <i32> [#uses=1]
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ret i32 %G
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}
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