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https://github.com/c64scene-ar/llvm-6502.git
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Remove more mayLoad workarounds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162556 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -19,7 +19,7 @@ let Constraints = "$src1 = $dst" in {
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multiclass fma3p_rm<bits<8> opc, string OpcodeStr,
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multiclass fma3p_rm<bits<8> opc, string OpcodeStr,
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PatFrag MemFrag128, PatFrag MemFrag256,
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PatFrag MemFrag128, PatFrag MemFrag256,
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ValueType OpVT128, ValueType OpVT256,
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ValueType OpVT128, ValueType OpVT256,
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SDPatternOperator Op = null_frag, bit MayLoad = 1> {
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SDPatternOperator Op = null_frag> {
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def r : FMA3<opc, MRMSrcReg, (outs VR128:$dst),
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def r : FMA3<opc, MRMSrcReg, (outs VR128:$dst),
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(ins VR128:$src1, VR128:$src2, VR128:$src3),
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(ins VR128:$src1, VR128:$src2, VR128:$src3),
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!strconcat(OpcodeStr,
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!strconcat(OpcodeStr,
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@ -27,7 +27,7 @@ multiclass fma3p_rm<bits<8> opc, string OpcodeStr,
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[(set VR128:$dst, (OpVT128 (Op VR128:$src2,
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[(set VR128:$dst, (OpVT128 (Op VR128:$src2,
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VR128:$src1, VR128:$src3)))]>;
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VR128:$src1, VR128:$src3)))]>;
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let mayLoad = MayLoad in
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let mayLoad = 1 in
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def m : FMA3<opc, MRMSrcMem, (outs VR128:$dst),
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def m : FMA3<opc, MRMSrcMem, (outs VR128:$dst),
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(ins VR128:$src1, VR128:$src2, f128mem:$src3),
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(ins VR128:$src1, VR128:$src2, f128mem:$src3),
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!strconcat(OpcodeStr,
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!strconcat(OpcodeStr,
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@ -42,7 +42,7 @@ multiclass fma3p_rm<bits<8> opc, string OpcodeStr,
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[(set VR256:$dst, (OpVT256 (Op VR256:$src2, VR256:$src1,
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[(set VR256:$dst, (OpVT256 (Op VR256:$src2, VR256:$src1,
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VR256:$src3)))]>;
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VR256:$src3)))]>;
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let mayLoad = MayLoad in
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let mayLoad = 1 in
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def mY : FMA3<opc, MRMSrcMem, (outs VR256:$dst),
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def mY : FMA3<opc, MRMSrcMem, (outs VR256:$dst),
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(ins VR256:$src1, VR256:$src2, f256mem:$src3),
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(ins VR256:$src1, VR256:$src2, f256mem:$src3),
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!strconcat(OpcodeStr,
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!strconcat(OpcodeStr,
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@ -59,7 +59,7 @@ multiclass fma3p_forms<bits<8> opc132, bits<8> opc213, bits<8> opc231,
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SDNode Op, ValueType OpTy128, ValueType OpTy256> {
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SDNode Op, ValueType OpTy128, ValueType OpTy256> {
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defm r213 : fma3p_rm<opc213,
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defm r213 : fma3p_rm<opc213,
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!strconcat(OpcodeStr, !strconcat("213", PackTy)),
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!strconcat(OpcodeStr, !strconcat("213", PackTy)),
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MemFrag128, MemFrag256, OpTy128, OpTy256, Op, 0>;
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MemFrag128, MemFrag256, OpTy128, OpTy256, Op>;
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let neverHasSideEffects = 1 in {
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let neverHasSideEffects = 1 in {
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defm r132 : fma3p_rm<opc132,
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defm r132 : fma3p_rm<opc132,
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!strconcat(OpcodeStr, !strconcat("132", PackTy)),
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!strconcat(OpcodeStr, !strconcat("132", PackTy)),
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@ -115,14 +115,14 @@ let ExeDomain = SSEPackedDouble in {
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let Constraints = "$src1 = $dst" in {
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let Constraints = "$src1 = $dst" in {
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multiclass fma3s_rm<bits<8> opc, string OpcodeStr, X86MemOperand x86memop,
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multiclass fma3s_rm<bits<8> opc, string OpcodeStr, X86MemOperand x86memop,
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RegisterClass RC, ValueType OpVT, PatFrag mem_frag,
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RegisterClass RC, ValueType OpVT, PatFrag mem_frag,
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SDPatternOperator OpNode = null_frag, bit MayLoad = 1> {
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SDPatternOperator OpNode = null_frag> {
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def r : FMA3<opc, MRMSrcReg, (outs RC:$dst),
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def r : FMA3<opc, MRMSrcReg, (outs RC:$dst),
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(ins RC:$src1, RC:$src2, RC:$src3),
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(ins RC:$src1, RC:$src2, RC:$src3),
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!strconcat(OpcodeStr,
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!strconcat(OpcodeStr,
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"\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
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"\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
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[(set RC:$dst,
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[(set RC:$dst,
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(OpVT (OpNode RC:$src2, RC:$src1, RC:$src3)))]>;
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(OpVT (OpNode RC:$src2, RC:$src1, RC:$src3)))]>;
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let mayLoad = MayLoad in
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let mayLoad = 1 in
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def m : FMA3<opc, MRMSrcMem, (outs RC:$dst),
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def m : FMA3<opc, MRMSrcMem, (outs RC:$dst),
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(ins RC:$src1, RC:$src2, x86memop:$src3),
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(ins RC:$src1, RC:$src2, x86memop:$src3),
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!strconcat(OpcodeStr,
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!strconcat(OpcodeStr,
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@ -163,7 +163,7 @@ let neverHasSideEffects = 1 in {
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}
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}
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defm r213 : fma3s_rm<opc213, !strconcat(OpStr, !strconcat("213", PackTy)),
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defm r213 : fma3s_rm<opc213, !strconcat(OpStr, !strconcat("213", PackTy)),
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x86memop, RC, OpVT, mem_frag, OpNode, 0>,
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x86memop, RC, OpVT, mem_frag, OpNode>,
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fma3s_rm_int<opc213, !strconcat(OpStr, !strconcat("213", PackTy)),
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fma3s_rm_int<opc213, !strconcat(OpStr, !strconcat("213", PackTy)),
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memop, mem_cpat, Int, RC>;
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memop, mem_cpat, Int, RC>;
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}
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}
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