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If-converter models predicated defs as read + write. The read should be marked as 'undef' since it may not already be live. This appeases -verify-machineinstrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157662 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -993,7 +993,8 @@ static void UpdatePredRedefs(MachineInstr *MI, SmallSet<unsigned,4> &Redefs,
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if (AddImpUse)
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if (AddImpUse)
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// Treat predicated update as read + write.
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// Treat predicated update as read + write.
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MI->addOperand(MachineOperand::CreateReg(Reg, false/*IsDef*/,
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MI->addOperand(MachineOperand::CreateReg(Reg, false/*IsDef*/,
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true/*IsImp*/,false/*IsKill*/));
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true/*IsImp*/,false/*IsKill*/,
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false/*IsDead*/,true/*IsUndef*/));
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} else {
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} else {
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Redefs.insert(Reg);
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Redefs.insert(Reg);
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for (const uint16_t *SR = TRI->getSubRegisters(Reg); *SR; ++SR)
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for (const uint16_t *SR = TRI->getSubRegisters(Reg); *SR; ++SR)
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