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Ignore all implicit reg operands

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84708 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov 2009-10-21 00:12:44 +00:00
parent efa236f40d
commit 3d6e560eef
1 changed files with 2 additions and 0 deletions
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lib/Target/MSP430/AsmPrinter/MSP430MCInstLower.cpp
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@ -100,6 +100,8 @@ void MSP430MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
MI->dump();
assert(0 && "unknown operand type");
case MachineOperand::MO_Register:
// Ignore all implicit register operands.
if (MO.isImplicit()) continue;
MCOp = MCOperand::CreateReg(MO.getReg());
break;
case MachineOperand::MO_Immediate: