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Refactor the logic for testing if an instruction is dead into a

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separate method.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56531 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2008-09-24 00:27:38 +00:00
parent 035268eaf7
commit 3d84a76917
1 changed files with 48 additions and 37 deletions
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73
lib/CodeGen/DeadMachineInstructionElim.cpp
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@ -25,9 +25,17 @@ namespace {
public MachineFunctionPass {
virtual bool runOnMachineFunction(MachineFunction &MF);
const TargetRegisterInfo *TRI;
const MachineRegisterInfo *MRI;
const TargetInstrInfo *TII;
BitVector LivePhysRegs;
public:
static char ID; // Pass identification, replacement for typeid
DeadMachineInstructionElim() : MachineFunctionPass(&ID) {}
private:
bool isDead(MachineInstr *MI) const;
};
}
char DeadMachineInstructionElim::ID = 0;
@ -40,16 +48,37 @@ FunctionPass *llvm::createDeadMachineInstructionElimPass() {
return new DeadMachineInstructionElim();
}
bool DeadMachineInstructionElim::isDead(MachineInstr *MI) const {
// Don't delete instructions with side effects.
bool SawStore = false;
if (!MI->isSafeToMove(TII, SawStore))
return false;
// Examine each operand.
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = MI->getOperand(i);
if (MO.isRegister() && MO.isDef()) {
unsigned Reg = MO.getReg();
if (TargetRegisterInfo::isPhysicalRegister(Reg) ?
LivePhysRegs[Reg] : !MRI->use_empty(Reg)) {
// This def has a use. Don't delete the instruction!
return false;
}
}
}
// If there are no defs with uses, the instruction is dead.
return true;
}
bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
bool AnyChanges = false;
const TargetRegisterInfo &TRI = *MF.getTarget().getRegisterInfo();
const MachineRegisterInfo &MRI = MF.getRegInfo();
const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
BitVector LivePhysRegs;
bool SawStore;
MRI = &MF.getRegInfo();
TRI = MF.getTarget().getRegisterInfo();
TII = MF.getTarget().getInstrInfo();
// Compute a bitvector to represent all non-allocatable physregs.
BitVector NonAllocatableRegs = TRI.getAllocatableSet(MF);
BitVector NonAllocatableRegs = TRI->getAllocatableSet(MF);
NonAllocatableRegs.flip();
// Loop over all instructions in all blocks, from bottom to top, so that it's
@ -65,8 +94,8 @@ bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
// Also add any explicit live-out physregs for this block.
if (!MBB->empty() && MBB->back().getDesc().isReturn())
for (MachineRegisterInfo::liveout_iterator LOI = MRI.liveout_begin(),
LOE = MRI.liveout_end(); LOI != LOE; ++LOI) {
for (MachineRegisterInfo::liveout_iterator LOI = MRI->liveout_begin(),
LOE = MRI->liveout_end(); LOI != LOE; ++LOI) {
unsigned Reg = *LOI;
if (TargetRegisterInfo::isPhysicalRegister(Reg))
LivePhysRegs.set(Reg);
@ -78,26 +107,8 @@ bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
MIE = MBB->rend(); MII != MIE; ) {
MachineInstr *MI = &*MII;
// Don't delete instructions with side effects.
SawStore = false;
if (MI->isSafeToMove(&TII, SawStore)) {
// Examine each operand.
bool AllDefsDead = true;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = MI->getOperand(i);
if (MO.isRegister() && MO.isDef()) {
unsigned Reg = MO.getReg();
if (TargetRegisterInfo::isPhysicalRegister(Reg) ?
LivePhysRegs[Reg] : !MRI.use_empty(Reg)) {
// This def has a use. Don't delete the instruction!
AllDefsDead = false;
break;
}
}
}
// If there are no defs with uses, the instruction is dead.
if (AllDefsDead) {
// If the instruction is dead, delete it!
if (isDead(MI)) {
AnyChanges = true;
MI->eraseFromParent();
MIE = MBB->rend();
@ -105,7 +116,6 @@ bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
// so don't increment it.
continue;
}
}
// Record the physreg defs.
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
@ -114,7 +124,7 @@ bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
unsigned Reg = MO.getReg();
if (Reg != 0 && TargetRegisterInfo::isPhysicalRegister(Reg)) {
LivePhysRegs.reset(Reg);
for (const unsigned *AliasSet = TRI.getAliasSet(Reg);
for (const unsigned *AliasSet = TRI->getAliasSet(Reg);
*AliasSet; ++AliasSet)
LivePhysRegs.reset(*AliasSet);
}
@ -128,7 +138,7 @@ bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
unsigned Reg = MO.getReg();
if (Reg != 0 && TargetRegisterInfo::isPhysicalRegister(Reg)) {
LivePhysRegs.set(Reg);
for (const unsigned *AliasSet = TRI.getAliasSet(Reg);
for (const unsigned *AliasSet = TRI->getAliasSet(Reg);
*AliasSet; ++AliasSet)
LivePhysRegs.set(*AliasSet);
}
@ -141,5 +151,6 @@ bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
}
}
LivePhysRegs.clear();
return AnyChanges;
}