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[MC] Reset the MCInst in the matcher function before adding opcode/operands.

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On X86, the Intel asm parser tries to match all memory operand sizes when
none is explicitly specified.  For LEA, which doesn't really have a memory
operand (just a pointer one), this results in multiple successful matches,
one for each memory size.  There's no error because it's same opcode, so
really, it's just one match.  However, the tablegen'd matcher function
adds opcode/operands to the passed MCInst, and this results in multiple
duplicated operands.

This commit clears the MCInst in the tablegen'd matcher function.
We sometimes clear it when the match failed, so there's no expectation of
keeping the previous content anyway.

Differential Revision: http://reviews.llvm.org/D6670


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224347 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ahmed Bougacha 2014-12-16 18:05:28 +00:00
parent e4aafdf6a1
commit 3ddc32292d
2 changed files with 4 additions and 0 deletions
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3
test/MC/X86/intel-syntax-unsized-memory.s
View File

@ -24,3 +24,6 @@ vmovdqa [rax], ymm0
// CHECK: vaddps (%rax), %zmm1, %zmm1
vaddps zmm1, zmm1, [rax]
// CHECK: leal 1(%r15d), %r9d
lea r9d, [r15d+1]

1
utils/TableGen/AsmMatcherEmitter.cpp
View File

@ -2965,6 +2965,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
OS << " continue;\n";
OS << " }\n";
OS << "\n";
OS << " Inst.clear();\n\n";
OS << " if (matchingInlineAsm) {\n";
OS << " Inst.setOpcode(it->Opcode);\n";
OS << " convertToMapAndConstraints(it->ConvertFn, Operands);\n";