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fix the BuildVector -> unpcklps logic to not do pointless shuffles
when the top elements of a vector are undefined. This happens all the time for X86-64 ABI stuff because only the low 2 elements of a 4 element vector are defined. For example, on: _Complex float f32(_Complex float A, _Complex float B) { return A+B; } We used to produce (with SSE2, SSE4.1+ uses insertps): _f32: ## @f32 movdqa %xmm0, %xmm2 addss %xmm1, %xmm2 pshufd $16, %xmm2, %xmm2 pshufd $1, %xmm1, %xmm1 pshufd $1, %xmm0, %xmm0 addss %xmm1, %xmm0 pshufd $16, %xmm0, %xmm1 movdqa %xmm2, %xmm0 unpcklps %xmm1, %xmm0 ret We now produce: _f32: ## @f32 movdqa %xmm0, %xmm2 addss %xmm1, %xmm2 pshufd $1, %xmm1, %xmm1 pshufd $1, %xmm0, %xmm3 addss %xmm1, %xmm3 movaps %xmm2, %xmm0 unpcklps %xmm3, %xmm0 ret This implements rdar://8368414 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112378 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -4304,8 +4304,18 @@ X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
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// Step 2: unpcklps X, Y ==> <3, 2, 1, 0>
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// Step 2: unpcklps X, Y ==> <3, 2, 1, 0>
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unsigned EltStride = NumElems >> 1;
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unsigned EltStride = NumElems >> 1;
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while (EltStride != 0) {
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while (EltStride != 0) {
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for (unsigned i = 0; i < EltStride; ++i)
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for (unsigned i = 0; i < EltStride; ++i) {
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// If V[i+EltStride] is undef and this is the first round of mixing,
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// then it is safe to just drop this shuffle: V[i] is already in the
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// right place, the one element (since it's the first round) being
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// inserted as undef can be dropped. This isn't safe for successive
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// rounds because they will permute elements within both vectors.
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if (V[i+EltStride].getOpcode() == ISD::UNDEF &&
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EltStride == NumElems/2)
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continue;
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V[i] = getUnpackl(DAG, dl, VT, V[i], V[i + EltStride]);
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V[i] = getUnpackl(DAG, dl, VT, V[i], V[i + EltStride]);
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}
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EltStride >>= 1;
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EltStride >>= 1;
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}
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}
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return V[0];
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return V[0];
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@ -18,3 +18,28 @@ define <8 x i16> @test2(<8 x i32> %a) nounwind {
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; %c = sext <4 x i16> %a to <4 x i32> ; <<4 x i32>> [#uses=1]
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; %c = sext <4 x i16> %a to <4 x i32> ; <<4 x i32>> [#uses=1]
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; ret <4 x i32> %c
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; ret <4 x i32> %c
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;}
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;}
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; This should not emit shuffles to populate the top 2 elements of the 4-element
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; vector that this ends up returning.
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; rdar://8368414
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define <2 x float> @test4(<2 x float> %A, <2 x float> %B) nounwind {
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entry:
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%tmp7 = extractelement <2 x float> %A, i32 0
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%tmp5 = extractelement <2 x float> %A, i32 1
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%tmp3 = extractelement <2 x float> %B, i32 0
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%tmp1 = extractelement <2 x float> %B, i32 1
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%add.r = fadd float %tmp7, %tmp3
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%add.i = fsub float %tmp5, %tmp1
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%tmp11 = insertelement <2 x float> undef, float %add.r, i32 0
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%tmp9 = insertelement <2 x float> %tmp11, float %add.i, i32 1
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ret <2 x float> %tmp9
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; CHECK: test4:
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; CHECK-NOT: shufps $16
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; CHECK: shufps $1,
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; CHECK-NOT: shufps $16
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; CHECK: shufps $1,
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; CHECK-NOT: shufps $16
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; CHECK: unpcklps
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; CHECK-NOT: shufps $16
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; CHECK: ret
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}
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