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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-07-29 10:25:12 +00:00
tidy up
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81304 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -76,20 +76,10 @@ void X86ATTAsmPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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if (Op.isReg()) {
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if (Op.isReg()) {
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O << '%';
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O << '%';
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unsigned Reg = Op.getReg();
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unsigned Reg = Op.getReg();
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#if 0
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if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
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EVT VT = (strcmp(Modifier+6,"64") == 0) ?
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EVT::i64 : ((strcmp(Modifier+6, "32") == 0) ? EVT::i32 :
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((strcmp(Modifier+6,"16") == 0) ? EVT::i16 : EVT::i8));
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Reg = getX86SubSuperRegister(Reg, VT);
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}
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#endif
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O << TRI->getAsmName(Reg);
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O << TRI->getAsmName(Reg);
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return;
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return;
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} else if (Op.isImm()) {
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} else if (Op.isImm()) {
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//if (!Modifier || (strcmp(Modifier, "debug") && strcmp(Modifier, "mem")))
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O << '$' << Op.getImm();
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O << '$';
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O << Op.getImm();
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return;
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return;
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} else if (Op.isExpr()) {
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} else if (Op.isExpr()) {
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O << '$';
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O << '$';
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@@ -101,7 +91,6 @@ void X86ATTAsmPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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}
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}
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void X86ATTAsmPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
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void X86ATTAsmPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
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const MCOperand &BaseReg = MI->getOperand(Op);
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const MCOperand &BaseReg = MI->getOperand(Op);
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const MCOperand &IndexReg = MI->getOperand(Op+2);
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const MCOperand &IndexReg = MI->getOperand(Op+2);
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const MCOperand &DispSpec = MI->getOperand(Op+3);
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const MCOperand &DispSpec = MI->getOperand(Op+3);
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@@ -110,20 +99,12 @@ void X86ATTAsmPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
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int64_t DispVal = DispSpec.getImm();
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int64_t DispVal = DispSpec.getImm();
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if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
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if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
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O << DispVal;
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O << DispVal;
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} else if (DispSpec.isExpr()) {
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DispSpec.getExpr()->print(O, MAI);
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} else {
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} else {
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llvm_unreachable("non-immediate displacement for LEA?");
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assert(DispSpec.isExpr() && "non-immediate displacement for LEA?");
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//assert(DispSpec.isGlobal() || DispSpec.isCPI() ||
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DispSpec.getExpr()->print(O, MAI);
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// DispSpec.isJTI() || DispSpec.isSymbol());
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//printOperand(MI, Op+3, "mem");
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}
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}
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if (IndexReg.getReg() || BaseReg.getReg()) {
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if (IndexReg.getReg() || BaseReg.getReg()) {
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// There are cases where we can end up with ESP/RSP in the indexreg slot.
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// If this happens, swap the base/index register to support assemblers that
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// don't work when the index is *SP.
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// FIXME: REMOVE THIS.
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assert(IndexReg.getReg() != X86::ESP && IndexReg.getReg() != X86::RSP);
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assert(IndexReg.getReg() != X86::ESP && IndexReg.getReg() != X86::RSP);
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O << '(';
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O << '(';
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