From 3e08131185d5b3245065eb027900aed56b607970 Mon Sep 17 00:00:00 2001 From: Devang Patel Date: Mon, 23 Jan 2012 20:20:06 +0000 Subject: [PATCH] Intel syntax: Parse memory operand with empty base reg, e.g. DWORD PTR [4*RDI] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148721 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/AsmParser/X86AsmParser.cpp | 22 ++++++++++++++++------ test/MC/X86/intel-syntax.s | 4 +++- 2 files changed, 19 insertions(+), 7 deletions(-) diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index f2fee362611..29e26eddc86 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -618,13 +618,23 @@ X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg, return X86Operand::CreateMem(Disp, Start, End, Size); } } else if (getLexer().is(AsmToken::Integer)) { - // Handle '[' number ']' - const MCExpr *Disp = MCConstantExpr::Create(0, getParser().getContext()); - if (getParser().ParseExpression(Disp, End)) return 0; - if (getLexer().isNot(AsmToken::RBrac)) - return ErrorOperand(Start, "Expected ']' token!"); + int64_t Val = Parser.getTok().getIntVal(); Parser.Lex(); - return X86Operand::CreateMem(Disp, Start, End, Size); + SMLoc Loc = Parser.getTok().getLoc(); + if (getLexer().is(AsmToken::RBrac)) { + // Handle '[' number ']' + Parser.Lex(); + return X86Operand::CreateMem(MCConstantExpr::Create(Val, getContext()), + Start, End, Size); + } else if (getLexer().is(AsmToken::Star)) { + // Handle '[' Scale*IndexReg ']' + Parser.Lex(); + SMLoc IdxRegLoc = Parser.getTok().getLoc(); + if (ParseRegister(IndexReg, IdxRegLoc, End)) + return ErrorOperand(IdxRegLoc, "Expected register"); + Scale = Val; + } else + return ErrorOperand(Loc, "Unepxeted token"); } if (getLexer().is(AsmToken::Plus) || getLexer().is(AsmToken::Minus)) { diff --git a/test/MC/X86/intel-syntax.s b/test/MC/X86/intel-syntax.s index fa58f1ee697..a0690708577 100644 --- a/test/MC/X86/intel-syntax.s +++ b/test/MC/X86/intel-syntax.s @@ -56,5 +56,7 @@ _main: // CHECK: fld %st(0) fld ST(0) // CHECK: movl %fs:(%rdi), %eax -mov EAX, DWORD PTR FS:[RDI] +mov EAX, DWORD PTR FS:[RDI] +// CHECK: leal (,%rdi,4), %r8d +lea R8D, DWORD PTR [4*RDI] ret