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CodeGen: it turns out that NAND is not the same thing as BIC. At all.
We've been performing the wrong operation on ARM for "atomicrmw nand" for years, since "a NAND b" is "~(a & b)" rather than ARM's very tempting "a & ~b". This bled over into the generic expansion pass. So I assume no-one has ever actually tried to do an atomic nand in the real world. Oh well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212443 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -186,7 +186,7 @@ bool AtomicExpandLoadLinked::expandAtomicRMW(AtomicRMWInst *AI) {
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NewVal = Builder.CreateAnd(Loaded, AI->getValOperand(), "new");
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break;
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case AtomicRMWInst::Nand:
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NewVal = Builder.CreateAnd(Loaded, Builder.CreateNot(AI->getValOperand()),
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NewVal = Builder.CreateNot(Builder.CreateAnd(Loaded, AI->getValOperand()),
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"new");
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break;
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case AtomicRMWInst::Or:
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