6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-16 11:30:51 +00:00
Code Issues Projects Releases Wiki Activity

Codegen mul by negative power of two with a shift and negate.

Browse Source 
This implements test/Regression/CodeGen/PowerPC/mul-neg-power-2.ll,
producing:

_foo:
        slwi r2, r3, 1
        subfic r3, r2, 63
        blr

instead of:

_foo:
        mulli r2, r3, -2
        addi r3, r2, 63
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24106 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-10-30 06:41:49 +00:00
parent 4446e04509
commit 3e6099b05f
1 changed files with 13 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -735,8 +735,7 @@ SDOperand DAGCombiner::visitMUL(SDNode *N) {
// fold (mul c1, c2) -> c1*c2 // fold (mul c1, c2) -> c1*c2
if (N0C && N1C) if (N0C && N1C)
return DAG.getConstant(N0C->getValue() * N1C->getValue(), return DAG.getConstant(N0C->getValue() * N1C->getValue(), VT);
N->getValueType(0));
// canonicalize constant to RHS // canonicalize constant to RHS
if (N0C && !N1C) if (N0C && !N1C)
return DAG.getNode(ISD::MUL, VT, N1, N0); return DAG.getNode(ISD::MUL, VT, N1, N0);
@ -748,9 +747,20 @@ SDOperand DAGCombiner::visitMUL(SDNode *N) {
return DAG.getNode(ISD::SUB, VT, DAG.getConstant(0, VT), N0); return DAG.getNode(ISD::SUB, VT, DAG.getConstant(0, VT), N0);
// fold (mul x, (1 << c)) -> x << c // fold (mul x, (1 << c)) -> x << c
if (N1C && isPowerOf2_64(N1C->getValue())) if (N1C && isPowerOf2_64(N1C->getValue()))
return DAG.getNode(ISD::SHL, N->getValueType(0), N0, return DAG.getNode(ISD::SHL, VT, N0,
DAG.getConstant(Log2_64(N1C->getValue()), DAG.getConstant(Log2_64(N1C->getValue()),
TLI.getShiftAmountTy())); TLI.getShiftAmountTy()));
// fold (mul x, -(1 << c)) -> -(x << c) or (-x) << c
if (N1C && isPowerOf2_64(-N1C->getSignExtended())) {
// FIXME: If the input is something that is easily negated (e.g. a
// single-use add), we should put the negate there.
return DAG.getNode(ISD::SUB, VT, DAG.getConstant(0, VT),
DAG.getNode(ISD::SHL, VT, N0,
DAG.getConstant(Log2_64(-N1C->getSignExtended()),
TLI.getShiftAmountTy())));
}
// fold (mul (mul x, c1), c2) -> (mul x, c1*c2) // fold (mul (mul x, c1), c2) -> (mul x, c1*c2)
if (N1C && N0.getOpcode() == ISD::MUL) { if (N1C && N0.getOpcode() == ISD::MUL) {
ConstantSDNode *N00C = dyn_cast<ConstantSDNode>(N0.getOperand(0)); ConstantSDNode *N00C = dyn_cast<ConstantSDNode>(N0.getOperand(0));