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Remove the Blackfin backend.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142880 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2011-10-25 00:05:42 +00:00
parent 29074ccf6c
commit 3e6157de57
101 changed files with 10 additions and 5820 deletions
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2
utils/lit/lit/ExampleTests/LLVM.InTree/test/site.exp
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@@ -2,7 +2,7 @@
# Do not edit here. If you wish to override these values
# edit the last section
set target_triplet "x86_64-apple-darwin10"
set TARGETS_TO_BUILD "X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 Blackfin CBackend MSIL CppBackend"
set TARGETS_TO_BUILD "X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 CBackend MSIL CppBackend"
set llvmgcc_langs "c,c++,objc,obj-c++"
set prcontext "/usr/bin/tclsh8.4 /Volumes/Data/ddunbar/llvm/test/Scripts/prcontext.tcl"
set llvmtoolsdir "/Users/ddunbar/llvm.obj.64/Debug/bin"

2
utils/lit/lit/ExampleTests/LLVM.OutOfTree/obj/test/site.exp
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@@ -2,7 +2,7 @@
# Do not edit here. If you wish to override these values
# edit the last section
set target_triplet "x86_64-apple-darwin10"
set TARGETS_TO_BUILD "X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 Blackfin CBackend MSIL CppBackend"
set TARGETS_TO_BUILD "X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 CBackend MSIL CppBackend"
set llvmgcc_langs "c,c++,objc,obj-c++"
set prcontext "/usr/bin/tclsh8.4 /Volumes/Data/ddunbar/llvm/test/Scripts/prcontext.tcl"
set llvmtoolsdir "/Users/ddunbar/llvm.obj.64/Debug/bin"