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Revert r148686 (and r148694, a fix to it) due to a serious layering

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violation -- MC cannot depend on CodeGen.

Specifically, the MCTargetDesc component of each target is actually
a subcomponent of the MC library. As such, it cannot depend on the
target-independent code generator, because MC itself cannot depend on
the target-independent code generator. This change moved a flag from the
ARM MCTargetDesc file ARMMCAsmInfo.cpp to the CodeGen layer in
ARMException.cpp, leaving behind an 'extern' to refer back to it. That
layering order isn't viable givin the constraints outlined above.
Commandline flags are designed to be static specifically to avoid these
types of bugs.

Fixing this is likely going to require some non-trivial refactoring.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148759 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chandler Carruth 2012-01-24 00:30:17 +00:00
parent 7b426cee22
commit 3eb4be0ace
5 changed files with 14 additions and 29 deletions
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1
include/llvm/MC/MCAsmInfo.h
View File

@ -30,7 +30,6 @@ namespace llvm {
namespace ExceptionHandling {
enum ExceptionsType { None, DwarfCFI, SjLj, ARM, Win64 };
enum ARMEHABIMode { ARMEHABIDisabled, ARMEHABIUnwind, ARMEHABIFull };
}
namespace LCOMM {

25
lib/CodeGen/AsmPrinter/ARMException.cpp
View File

@ -29,7 +29,6 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Dwarf.h"
#include "llvm/Support/FormattedStream.h"
#include "llvm/ADT/SmallString.h"
@ -37,18 +36,6 @@
#include "llvm/ADT/Twine.h"
using namespace llvm;
cl::opt<ExceptionHandling::ARMEHABIMode>
EnableARMEHABI("arm-enable-ehabi", cl::Hidden,
cl::desc("Generate ARM EHABI tables:"),
cl::values(clEnumValN(ExceptionHandling::ARMEHABIDisabled, "no",
"Do not generate ARM EHABI tables"),
clEnumValN(ExceptionHandling::ARMEHABIUnwind, "unwind",
"Emit unwinding instructions, but not descriptors"),
clEnumValN(ExceptionHandling::ARMEHABIFull, "full",
"Generate full ARM EHABI tables"),
clEnumValEnd));
ARMException::ARMException(AsmPrinter *A)
: DwarfException(A),
shouldEmitTable(false), shouldEmitMoves(false), shouldEmitTableModule(false)
@ -85,15 +72,13 @@ void ARMException::EndFunction() {
Asm->OutStreamer.EmitPersonality(PerSym);
}
if (EnableARMEHABI == ExceptionHandling::ARMEHABIFull) {
// Map all labels and get rid of any dead landing pads.
MMI->TidyLandingPads();
// Map all labels and get rid of any dead landing pads.
MMI->TidyLandingPads();
Asm->OutStreamer.EmitHandlerData();
Asm->OutStreamer.EmitHandlerData();
// Emit actual exception table
EmitExceptionTable();
}
// Emit actual exception table
EmitExceptionTable();
}
Asm->OutStreamer.EmitFnEnd();

5
lib/Target/ARM/ARMAsmPrinter.cpp
View File

@ -1192,7 +1192,7 @@ void ARMAsmPrinter::EmitUnwindingInstruction(const MachineInstr *MI) {
}
}
extern cl::opt<ExceptionHandling::ARMEHABIMode> EnableARMEHABI;
extern cl::opt<bool> EnableARMEHABI;
// Simple pseudo-instructions have their lowering (with expansion to real
// instructions) auto-generated.
@ -1203,8 +1203,7 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
OutStreamer.EmitCodeRegion();
// Emit unwinding stuff for frame-related instructions
if (EnableARMEHABI != ExceptionHandling::ARMEHABIDisabled &&
MI->getFlag(MachineInstr::FrameSetup))
if (EnableARMEHABI && MI->getFlag(MachineInstr::FrameSetup))
EmitUnwindingInstruction(MI);
// Do any auto-generated pseudo lowerings.

7
lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
View File

@ -16,7 +16,10 @@
using namespace llvm;
extern cl::opt<ExceptionHandling::ARMEHABIMode> EnableARMEHABI;
cl::opt<bool>
EnableARMEHABI("arm-enable-ehabi", cl::Hidden,
cl::desc("Generate ARM EHABI tables"),
cl::init(false));
static const char *const arm_asm_table[] = {
@ -79,6 +82,6 @@ ARMELFMCAsmInfo::ARMELFMCAsmInfo() {
SupportsDebugInformation = true;
// Exceptions handling
if (EnableARMEHABI != ExceptionHandling::ARMEHABIDisabled)
if (EnableARMEHABI)
ExceptionsType = ExceptionHandling::ARM;
}

5
test/CodeGen/ARM/ehabi-unwind.ll
View File

@ -1,8 +1,7 @@
; Test that the EHABI unwind instruction generator does not encounter any
; unfamiliar instructions.
; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi=full -disable-fp-elim
; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi=full
; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi=unwind
; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi -disable-fp-elim
; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi
define void @_Z1fv() nounwind {
entry: