6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-15 04:30:12 +00:00
Code Issues Projects Releases Wiki Activity

Do not select tSXTB / tSXTH in thumb2 mode.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76600 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2009-07-21 18:15:26 +00:00
parent b3056faa55
commit 3ecadc816d
2 changed files with 38 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/Target/ARM/ARMInstrThumb.td
View File

@ -624,9 +624,9 @@ def : T1Pat<(extloadi16 t_addrmode_s2:$addr), (tLDRH t_addrmode_s2:$addr)>;
// If it's possible to use [r,r] address mode for sextload, select to // If it's possible to use [r,r] address mode for sextload, select to
// ldr{b|h} + sxt{b|h} instead. // ldr{b|h} + sxt{b|h} instead.
def : TPat<(sextloadi8 t_addrmode_s1:$addr), def : T1Pat<(sextloadi8 t_addrmode_s1:$addr),
(tSXTB (tLDRB t_addrmode_s1:$addr))>; (tSXTB (tLDRB t_addrmode_s1:$addr))>;
def : TPat<(sextloadi16 t_addrmode_s2:$addr), def : T1Pat<(sextloadi16 t_addrmode_s2:$addr),
(tSXTH (tLDRH t_addrmode_s2:$addr))>; (tSXTH (tLDRH t_addrmode_s2:$addr))>;

34
test/CodeGen/Thumb2/2009-07-21-ISelBug.ll Normal file
View File

@ -0,0 +1,34 @@
; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin9 -mattr=+vfp2,+thumb2
; rdar://7076238
@"\01LC" = external constant [36 x i8], align 1 ; <[36 x i8]*> [#uses=1]
define arm_apcscc i32 @getUnknown(i32, ...) nounwind {
entry:
%1 = load i8** undef, align 4 ; <i8*> [#uses=3]
%2 = getelementptr i8* %1, i32 4 ; <i8*> [#uses=1]
%3 = getelementptr i8* %1, i32 8 ; <i8*> [#uses=1]
%4 = bitcast i8* %2 to i32* ; <i32*> [#uses=1]
%5 = load i32* %4, align 4 ; <i32> [#uses=1]
%6 = trunc i32 %5 to i8 ; <i8> [#uses=1]
%7 = getelementptr i8* %1, i32 12 ; <i8*> [#uses=1]
%8 = bitcast i8* %3 to i32* ; <i32*> [#uses=1]
%9 = load i32* %8, align 4 ; <i32> [#uses=1]
%10 = trunc i32 %9 to i16 ; <i16> [#uses=1]
%11 = bitcast i8* %7 to i32* ; <i32*> [#uses=1]
%12 = load i32* %11, align 4 ; <i32> [#uses=1]
%13 = trunc i32 %12 to i16 ; <i16> [#uses=1]
%14 = load i32* undef, align 4 ; <i32> [#uses=2]
%15 = sext i8 %6 to i32 ; <i32> [#uses=2]
%16 = sext i16 %10 to i32 ; <i32> [#uses=2]
%17 = sext i16 %13 to i32 ; <i32> [#uses=2]
%18 = call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([36 x i8]* @"\01LC", i32 0, i32 0), i32 -128, i32 0, i32 %15, i32 %16, i32 %17, i32 0, i32 %14) nounwind ; <i32> [#uses=0]
%19 = add i32 0, %15 ; <i32> [#uses=1]
%20 = add i32 %19, %16 ; <i32> [#uses=1]
%21 = add i32 %20, %14 ; <i32> [#uses=1]
%22 = add i32 %21, %17 ; <i32> [#uses=1]
%23 = add i32 %22, 0 ; <i32> [#uses=1]
ret i32 %23
}
declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind